From patchwork Wed Apr 17 13:48:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Winiarska, Iwona" X-Patchwork-Id: 13633410 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48A84C4345F for ; Wed, 17 Apr 2024 13:49:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=BNc+BSLJDwYvOylV54Zs77yxK/538IdFNfND9jnoPaE=; b=vRSc3jhgUseGId s3eCyiYh5j6j6T/l1L4HfLDN73QwZE2XgOdYUtlzqwmQJExmzLzyRstEEiA4zvJb7piYM+cBbB9HA ARC14Ns8LbQ30UFKbtmxVm/EWbw6Qi6ovzc0tlX30GfPbD67eNG0epd8rbwfQ7g4K9hmAByXEEltR RT7+rjlgnCGfr+6bCurbdPLhVw4HoVAnCmh9i8dqB+4oiJgggUBRH+HZMLIQeSaKRmpy5AIFMJ0nu ZBEZUG4VNT8G5U0YbCZ7aKKKckf/UImv0Xel9/F0bJA+4/XWCMI4RwqMOmh70a1iVHVMi8yZLOzQV pykJmlYSsY2br7tCt9bA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rx5f5-0000000GED9-0DW2; Wed, 17 Apr 2024 13:49:19 +0000 Received: from mgamail.intel.com ([192.198.163.10]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rx5f2-0000000GECi-2k8U for linux-arm-kernel@lists.infradead.org; Wed, 17 Apr 2024 13:49:18 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713361756; x=1744897756; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=ltyfGUT+Q1+XHGbLf8LZqsmChBW2AZtse+4kwOov8BQ=; b=SSawaZvhwCu3dKbnxKPPWvZoBfXrpg+KjlVfe6QJfyfyvaupKknDR0g3 rYxBWzK4UNOT4u1VfiiJc6MlIuVjM49+PBLrvafwFiCQEz/MfyuoNDSwZ q+CiNOYYaH0Iw1IaiYFGNkBQi84s6u57Iici+6ifmba77OTR6Uibuekc0 cLCMjUA0MuaPKF7OPJSzHaAkPdfKuXgof42iWClCi+lU6CII1C7r/QcsK Wc3/rdKS/KQteJb3pJzG4SFuQ0PhrkiFtl5kXaTEFQQ47mAN2YYFsFtGm Wu5sBsxwJ5AfP30QwSY+58rYygLKIcTBOreV7Hm3zHNgY4KpVPvUCairo Q==; X-CSE-ConnectionGUID: bnXDp5LxTguEHP7pxKIjgw== X-CSE-MsgGUID: yHN0MDjASPel+xRQ//MrkA== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="20243260" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="20243260" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:49:13 -0700 X-CSE-ConnectionGUID: 15UkjXbFQ0yniwze6OGHzw== X-CSE-MsgGUID: lHfY7O6WRHO4OiRM3eJPng== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="23059043" Received: from molech-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.62.36]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:49:12 -0700 From: Iwona Winiarska To: openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Cc: Billy Tsai , Iwona Winiarska Subject: [PATCH] peci: aspeed: Clear clock_divider value before setting it Date: Wed, 17 Apr 2024 15:48:49 +0200 Message-ID: <20240417134849.5793-1-iwona.winiarska@intel.com> X-Mailer: git-send-email 2.44.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_064916_747450_9068628A X-CRM114-Status: UNSURE ( 6.82 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org PECI clock divider is programmed on 10:8 bits of PECI Control register. Before setting a new value, clear bits read from hardware. Signed-off-by: Iwona Winiarska Reviewed-by: Billy Tsai --- drivers/peci/controller/peci-aspeed.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/peci/controller/peci-aspeed.c b/drivers/peci/controller/peci-aspeed.c index 7fdc25afcf2f..de7046e6b9c4 100644 --- a/drivers/peci/controller/peci-aspeed.c +++ b/drivers/peci/controller/peci-aspeed.c @@ -351,6 +351,7 @@ static int clk_aspeed_peci_set_rate(struct clk_hw *hw, unsigned long rate, clk_aspeed_peci_find_div_values(this_rate, &msg_timing, &clk_div_exp); val = readl(aspeed_peci->base + ASPEED_PECI_CTRL); + val &= ~ASPEED_PECI_CTRL_CLK_DIV_MASK; val |= FIELD_PREP(ASPEED_PECI_CTRL_CLK_DIV_MASK, clk_div_exp); writel(val, aspeed_peci->base + ASPEED_PECI_CTRL);