From patchwork Tue Apr 23 12:33:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amelie Delaunay X-Patchwork-Id: 13639988 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6E7C1C10F15 for ; Tue, 23 Apr 2024 12:37:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xqOoB+NmO7DJM7YXA6Sb4VUYByMlqyoPf4csk4pMKe0=; b=lJgvb6JSnsfXlS K89TzTRo715tg3wpP2sDhKiL3qKTO3mFAs1t+fUYl9FSjBK0pNRpSzu7avyQ7hGR2NQEoRqk5LjrT 9AA47SL2grNHS2zqJIZzd7s3sddcMGXHrgxDeJK0yFG2dlfYtI5jtHf5Qu5TxvwGR3ILREN8xf/cx 0qoKDIRg9NYG8afCVgMJoMlhRMq+rWvK/5G3Y0eGFIC1mUKK36hsslY3d4xEwev6I903y1Wds+YuK YfFL40rdB2ZoThIky0F4scG4a8ZE9G4Mzn+I6aw4tiERGbj2Qa0OJFt4IW5tUWZFRffLjH0wq0q2T t4WvT27PqoGjoXCIM0QQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rzFOD-0000000HQ0P-1O2t; Tue, 23 Apr 2024 12:36:49 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rzFNt-0000000HPo0-2iSK for linux-arm-kernel@lists.infradead.org; Tue, 23 Apr 2024 12:36:32 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 43N8MPMp025800; Tue, 23 Apr 2024 14:36:22 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=tLeBG8xuyVlQKOz/nCxfni5Ym0lMbbFb1oQNqyvoqWY=; b=jo Y3frBOlPnwbBuX/iy6dfTG1Ont6r1eO7ztx5HujzyZAZUTVefKw8hAu4aMV+flQV 4FVqX5te/SeDaZ98ZM+I9tMQWEGYuAEgeSEJfHpHxPBn9yCgGCtkMFEzbADhXm27 pZjVW+01Nm2YJn3QSH6Vm7Go7RJrKXRG8DXnmCEKkiY8Mjc9w9S2JHgG+rcjAj4R uCzJFX+wIzy7o3u/M+GY3WRWN/pbghx1Lmr2+doSoJDLpGQD4ygp/wVnk/5cdsce OAgTcctn/Z0AkFPRw11iil0H/5lKvULTdpC7FhdKs+CYq7sARr7YJfg4zBkRB6L4 j09GkUrA9iG1Y9kejYZg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3xm4edudxg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 23 Apr 2024 14:36:21 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id A141140049; Tue, 23 Apr 2024 14:36:16 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 3764721A23B; Tue, 23 Apr 2024 14:35:33 +0200 (CEST) Received: from localhost (10.48.86.143) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 23 Apr 2024 14:35:32 +0200 From: Amelie Delaunay To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue CC: , , , , , , Amelie Delaunay Subject: [PATCH 12/12] arm64: dts: st: add HPDMA nodes on stm32mp251 Date: Tue, 23 Apr 2024 14:33:02 +0200 Message-ID: <20240423123302.1550592-13-amelie.delaunay@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240423123302.1550592-1-amelie.delaunay@foss.st.com> References: <20240423123302.1550592-1-amelie.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.86.143] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-23_11,2024-04-23_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240423_053630_457696_EBC4029A X-CRM114-Status: GOOD ( 10.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The High Performance Direct Memory Access (HPDMA) controller is used to perform programmable data transfers between memory-mapped peripherals and memories (or between memories) via linked-lists. There are 3 instances of HPDMA on stm32mp251, using stm32-dma3 driver, with 16 channels per instance and with one interrupt per channel. Channels 0 to 7 are implemented with a FIFO of 8 bytes. Channels 8 to 11 are implemented with a FIFO of 32 bytes. Channels 12 to 15 are implemented with a FIFO of 128 bytes. Thanks to stm32-dma3 bindings, the user can ask for a channel with specific FIFO size. Signed-off-by: Amelie Delaunay --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 69 ++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 5dd4f3580a60..0b80d23fbb54 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -123,6 +123,75 @@ soc@0 { interrupt-parent = <&intc>; ranges = <0x0 0x0 0x0 0x80000000>; + hpdma: dma-controller@40400000 { + compatible = "st,stm32-dma3"; + reg = <0x40400000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&ck_icn_ls_mcu>; + #dma-cells = <3>; + }; + + hpdma2: dma-controller@40410000 { + compatible = "st,stm32-dma3"; + reg = <0x40410000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&ck_icn_ls_mcu>; + #dma-cells = <3>; + }; + + hpdma3: dma-controller@40420000 { + compatible = "st,stm32-dma3"; + reg = <0x40420000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&ck_icn_ls_mcu>; + #dma-cells = <3>; + }; + rifsc: rifsc-bus@42080000 { compatible = "simple-bus"; reg = <0x42080000 0x1000>;