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[35.204.239.8]) by smtp.gmail.com with ESMTPSA id r20-20020a170906705400b00a555ef55ab5sm10417289ejj.218.2024.04.26.03.03.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 03:03:07 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Fri, 26 Apr 2024 11:03:05 +0100 Subject: [PATCH v2 2/5] arm64: dts: exynos: gs101: enable cmu-hsi0 clock controller MIME-Version: 1.0 Message-Id: <20240426-hsi0-gs101-v2-2-2157da8b63e3@linaro.org> References: <20240426-hsi0-gs101-v2-0-2157da8b63e3@linaro.org> In-Reply-To: <20240426-hsi0-gs101-v2-0-2157da8b63e3@linaro.org> To: Peter Griffin , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi Cc: Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.12.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240426_030318_045379_6762597F X-CRM114-Status: UNSURE ( 8.57 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable the cmu-hsi0 clock controller. It feeds USB. Signed-off-by: André Draszik --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index eddb6b326fde..9755a0bb70a1 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1247,6 +1247,20 @@ spi_13: spi@10d60000 { }; }; + cmu_hsi0: clock-controller@11000000 { + compatible = "google,gs101-cmu-hsi0"; + reg = <0x11000000 0x4000>; + #clock-cells = <1>; + + clocks = <&ext_24_5m>, + <&cmu_top CLK_DOUT_CMU_HSI0_BUS>, + <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>, + <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>, + <&cmu_top CLK_DOUT_CMU_HSI0_USBDPDBG>; + clock-names = "oscclk", "bus", "dpgtc", "usb31drd", + "usbdpdbg"; + }; + pinctrl_hsi1: pinctrl@11840000 { compatible = "google,gs101-pinctrl"; reg = <0x11840000 0x00001000>;