| Message ID | 20240429-samsung-pinctrl-busclock-dts-v1-4-5e935179f3ca@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hook up pin controller clocks on Google Tensor gs101 | expand |
On 29/04/2024 22:04, André Draszik wrote: > The pinctrl instances hsi1, gsactrl, and gsacore need a clock for > register access to work. > > Since we haven't implemented the relevant CMUs for the clocks required > by these instances just add placeholder clocks for now so as to make the > DT pass the validation checks. > Once the clocks are implmented in the gs101 clock driver, these should > be updated then. > > Signed-off-by: André Draszik <andre.draszik@linaro.org> > --- > arch/arm64/boot/dts/exynos/google/gs101.dtsi | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > index f8fcbbb06e7b..6db2c9bbb371 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > @@ -180,6 +180,14 @@ HERA_CPU_SLEEP: cpu-hera-sleep { > }; > }; > > + /* TODO: Remove this once all pinctrl clocks are implemented */ > + clk_placeholder: clock-placeholder { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + clock-output-names = "placeholder_clk"; > + }; > + > /* ect node is required to be present by bootloader */ > ect { > }; > @@ -1309,6 +1317,9 @@ usbdrd31_dwc3: usb@0 { > pinctrl_hsi1: pinctrl@11840000 { > compatible = "google,gs101-pinctrl"; > reg = <0x11840000 0x00001000>; > + /* TODO: update once support for this CMU exists */ > + clocks = <&clk_placeholder>; <0> does not work for you? Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index f8fcbbb06e7b..6db2c9bbb371 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -180,6 +180,14 @@ HERA_CPU_SLEEP: cpu-hera-sleep { }; }; + /* TODO: Remove this once all pinctrl clocks are implemented */ + clk_placeholder: clock-placeholder { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "placeholder_clk"; + }; + /* ect node is required to be present by bootloader */ ect { }; @@ -1309,6 +1317,9 @@ usbdrd31_dwc3: usb@0 { pinctrl_hsi1: pinctrl@11840000 { compatible = "google,gs101-pinctrl"; reg = <0x11840000 0x00001000>; + /* TODO: update once support for this CMU exists */ + clocks = <&clk_placeholder>; + clock-names = "pclk"; interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>; }; @@ -1380,11 +1391,17 @@ wakeup-interrupt-controller { pinctrl_gsactrl: pinctrl@17940000 { compatible = "google,gs101-pinctrl"; reg = <0x17940000 0x00001000>; + /* TODO: update once support for this CMU exists */ + clocks = <&clk_placeholder>; + clock-names = "pclk"; }; pinctrl_gsacore: pinctrl@17a80000 { compatible = "google,gs101-pinctrl"; reg = <0x17a80000 0x00001000>; + /* TODO: update once support for this CMU exists */ + clocks = <&clk_placeholder>; + clock-names = "pclk"; }; cmu_top: clock-controller@1e080000 {
The pinctrl instances hsi1, gsactrl, and gsacore need a clock for register access to work. Since we haven't implemented the relevant CMUs for the clocks required by these instances just add placeholder clocks for now so as to make the DT pass the validation checks. Once the clocks are implmented in the gs101 clock driver, these should be updated then. Signed-off-by: André Draszik <andre.draszik@linaro.org> --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)