From patchwork Thu May 2 10:38:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U2hhd24gU3VuZyAo5a6L5a2d6KyZKQ==?= X-Patchwork-Id: 13651581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DDD99C25B4F for ; Thu, 2 May 2024 10:39:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=nYhxdQ4XJeeSwQ3fUVcGIxPt5JbD8RXrT6ZOXZZpYus=; b=1g8FbiEyxMJKBW aSEnTDYtm/I6OfD8GP8iqd0Hji4MiIhUDExr8MkWPtGJ25ZhYwJI6aLqf/hRTK0ldgD/qO5R6gZEP AuTLRHZ0RLyQBducQUEGpxXG7VKeZfOfYRxL1+pVtz7oBQmOhdgEYMb5nsmMuGXcihkGjCvsHiIOb 2HIohr1UFF6aiHavmdVhznBOa5hTtuRghZfk9KflA8Tg8dYSz/mdqMzjPeGgok95qs5TjB0FkYnb2 bN1qfsAQComNURqiROopSsGicmuX+1FLmpdKqZCB8YnFUbh9d6WH5mRAWXxAs63D/Nx/PUudVmwkn 0OPPF3aCLuZOgJNxVM6w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s2TqP-0000000CM3Y-3sTt; Thu, 02 May 2024 10:39:17 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s2TqC-0000000CLpR-13OC; Thu, 02 May 2024 10:39:06 +0000 X-UUID: 2fa4e230087011ef9a78ddf43a9225dc-20240502 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=+XOaqvKKo60V5JWfLkrFv2Q93TBVwfFs5BEjU7vxWP0=; b=iM5BKa/5A9DY6TJQPspsq72KlOaY/IZpBqrkxQLexcN4d/jGLtQcoi5YQuEGF1Y3YZCb05Je3IEi99dZ+Y8D7JSTjhKuDJ2x653xy1VM/OEdq40WxHn87YtRI30A2FXDQ9DKBEqQH1vrd7YE4C6stUdZBP3YM7v4/ML60LYVgKY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.38,REQID:75685304-4442-43bf-a904-52f1d7339eb4,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:82c5f88,CLOUDID:c0ee9afb-ed05-4274-9204-014369d201e8,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2fa4e230087011ef9a78ddf43a9225dc-20240502 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1581828383; Thu, 02 May 2024 03:39:00 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS14N2.mediatek.inc (172.21.101.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 2 May 2024 18:38:56 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 2 May 2024 18:38:56 +0800 From: Shawn Sung To: Chun-Kuang Hu , AngeloGioacchino Del Regno CC: Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , Bibby Hsieh , CK Hu , "Nancy . Lin" , Fei Shao , Sean Paul , Jason Chen , , , , , "Hsiao Chien Sung" Subject: [PATCH v7 09/18] drm/mediatek: Support constant blending in OVL Date: Thu, 2 May 2024 18:38:39 +0800 Message-ID: <20240502103848.5845-10-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240502103848.5845-1-shawn.sung@mediatek.com> References: <20240502103848.5845-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--7.014400-8.000000 X-TMASE-MatchedRID: gZQz39yqSjfX3tqA7xZNm8ULzBBTAHAlEbxKVXd70tXfUZT83lbkEB8+ XHETeZCzN+7y0ElYiShN07ecPiYifxvVxZLseBRpo2n0EGDeHYTrwADV7fYz7Luqk4cq52pzje0 jgce+svLi8zVgXoAltsIJ+4gwXrEtwrbXMGDYqV8PXZPurZ0hSylldsFtwSYSfKx+pSd7fJSwt3 bU6fZRrk3qMEl8fGfE X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--7.014400-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: A0B01D7939BDD3503480C7CABCABC8241FC2CC26E4F073973BEB098C26C588FB2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240502_033904_350959_002B9898 X-CRM114-Status: GOOD ( 10.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Hsiao Chien Sung Support constant alpha blending in OVL. Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index 738244a6164e8..e41fd83e36e79 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -38,6 +38,7 @@ #define DISP_REG_OVL_PITCH_MSB(n) (0x0040 + 0x20 * (n)) #define OVL_PITCH_MSB_2ND_SUBBUF BIT(16) #define DISP_REG_OVL_PITCH(n) (0x0044 + 0x20 * (n)) +#define OVL_CONST_BLEND BIT(28) #define DISP_REG_OVL_RDMA_CTRL(n) (0x00c0 + 0x20 * (n)) #define DISP_REG_OVL_RDMA_GMC(n) (0x00c8 + 0x20 * (n)) #define DISP_REG_OVL_ADDR_MT2701 0x0040 @@ -428,6 +429,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, unsigned int fmt = pending->format; unsigned int offset = (pending->y << 16) | pending->x; unsigned int src_size = (pending->height << 16) | pending->width; + unsigned int ignore_pixel_alpha = 0; unsigned int con; bool is_afbc = pending->modifier != DRM_FORMAT_MOD_LINEAR; union overlay_pitch { @@ -449,6 +451,9 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, if (state->base.fb && state->base.fb->format->has_alpha) con |= OVL_CON_AEN | OVL_CON_ALPHA; + if (state->base.fb && !state->base.fb->format->has_alpha) + ignore_pixel_alpha = OVL_CONST_BLEND; + if (pending->rotation & DRM_MODE_REFLECT_Y) { con |= OVL_CON_VIRT_FLIP; addr += (pending->height - 1) * pending->pitch; @@ -464,8 +469,8 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, mtk_ddp_write_relaxed(cmdq_pkt, con, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_CON(idx)); - mtk_ddp_write_relaxed(cmdq_pkt, overlay_pitch.split_pitch.lsb, &ovl->cmdq_reg, ovl->regs, - DISP_REG_OVL_PITCH(idx)); + mtk_ddp_write_relaxed(cmdq_pkt, overlay_pitch.split_pitch.lsb | ignore_pixel_alpha, + &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH(idx)); mtk_ddp_write_relaxed(cmdq_pkt, src_size, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_SRC_SIZE(idx)); mtk_ddp_write_relaxed(cmdq_pkt, offset, &ovl->cmdq_reg, ovl->regs,