From patchwork Tue May 7 10:33:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaishnav Achath X-Patchwork-Id: 13656599 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6915C10F1A for ; Tue, 7 May 2024 10:34:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=ILdnQqYH4Vm6IAOTIClDY2jmpIHbUcoyvh0S3dLcZMc=; b=YoESLWOB9XwL/K t4xALjuhATvOLIJnwQPPtWd2X3wzpnqkc/5v2Fa8+lykmZR6HHXxMZX8/0C/P7HWf4zLK/yDO0qdK U2nCGly3/9+lI3Ba9UDVHipTcKQuyiQemghaXwb2Voq8TauQmIx3XGtIAvTicVi3L6qIVy6vlbGDw InwQhdwwD4rUXMS1R/7ZdqdRWu3YbMCKYRbKKrDKr94LjhY31ZySz7blIVzwY83K5KenC3B5lpfIA n7n0XfJGmfRqWXIw+QoV6Te7oFl8ENzRxa+//ZRMiqw7Xs9Wg4ceDHhRjl+0VXliAqcqsEaK/JpL/ 3KkovwX8oe+hbjao7dKg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s4I8q-0000000AYGN-08WF; Tue, 07 May 2024 10:33:48 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s4I8l-0000000AYFC-2a8n for linux-arm-kernel@lists.infradead.org; Tue, 07 May 2024 10:33:45 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 447AXb53067817; Tue, 7 May 2024 05:33:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1715078017; bh=zv5l/OYnMFKUHadlnPzeVyb6qRV4kJtWC47FOfdYpxo=; h=From:To:CC:Subject:Date; b=Ep1WvJE509PJT0NuJphxSSih/ddxQJgUTFk0ki8T7/vSrVND1zSVhFCTsakKrBOvo Vet8PpW24YILdVVm7DC/ZFoEtAByTlRJ2mLTae96uorF36F7zkJc3q4acQkWi6R4f2 7AAzrpJ1cmT304jbUnxZzzSSDScLY7guKRsrwQ6Y= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 447AXb7G065328 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 7 May 2024 05:33:37 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 7 May 2024 05:33:37 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 7 May 2024 05:33:37 -0500 Received: from uda0490681.. ([10.24.69.142]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 447AXWEm068713; Tue, 7 May 2024 05:33:33 -0500 From: Vaishnav Achath To: , , , , , CC: , , , , , Subject: [PATCH] arm64: dts: ti: k3-j722s: Fix main domain GPIO count Date: Tue, 7 May 2024 16:03:32 +0530 Message-ID: <20240507103332.167928-1-vaishnav.a@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240507_033343_862162_1BD544E6 X-CRM114-Status: UNSURE ( 8.75 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org J722S does not pin out all of the GPIO same as AM62P and have more number of GPIO on the main_gpio1 instance. Fix the GPIO count on both instances by overriding the ti,ngpio property. Fixes: ea55b9335ad8 ("arm64: dts: ti: Introduce J722S family of SoCs") More details at J722S/AM67 Datasheet (Section 5.3.11, GPIO): https://www.ti.com/lit/ds/symlink/am67.pdf Signed-off-by: Vaishnav Achath --- Logs (6.9.0-rc7-next-20240507): https://gist.github.com/vaishnavachath/2a629f73f4216fe00b74a7270b987534 arch/arm64/boot/dts/ti/k3-j722s.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi index c75744edb143..9132b0232b0b 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -83,6 +83,14 @@ &inta_main_dmss { ti,interrupt-ranges = <7 71 21>; }; +&main_gpio0 { + ti,ngpio = <87>; +}; + +&main_gpio1 { + ti,ngpio = <73>; +}; + &oc_sram { reg = <0x00 0x70000000 0x00 0x40000>; ranges = <0x00 0x00 0x70000000 0x40000>;