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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240519_114242_028428_19ACE8FB X-CRM114-Status: GOOD ( 15.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org intel,lgm-syscon is not a simple syscon device - it has children - thus it should be fully documented in its own binding. Signed-off-by: Krzysztof Kozlowski --- Context might depend on https://lore.kernel.org/r/20240510123018.3902184-1-robh@kernel.org and also further patches here depend on this one. --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 - .../bindings/soc/intel/intel,lgm-syscon.yaml | 53 ++++++++++++++++++++++ 2 files changed, 53 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 622ea0f1b08e..5a0aeae24a50 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -77,7 +77,6 @@ properties: - hisilicon,pcie-sas-subctrl - hisilicon,peri-subctrl - hpe,gxp-sysreg - - intel,lgm-syscon - loongson,ls1b-syscon - loongson,ls1c-syscon - lsi,axxia-syscon diff --git a/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml new file mode 100644 index 000000000000..aa8d24074fd7 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Lightning Mountain(LGM) Syscon + +maintainers: + - Ramuthevar Vadivel Murugan + +properties: + compatible: + items: + - const: intel,lgm-syscon + - const: syscon + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + "^emmc-phy@[0-9a-f]+$": + $ref: /schemas/phy/intel,lgm-emmc-phy.yaml# + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + chiptop@e0200000 { + compatible = "intel,lgm-syscon", "syscon"; + reg = <0xe0200000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + + emmc-phy@a8 { + compatible = "intel,lgm-emmc-phy"; + reg = <0x00a8 0x10>; + clocks = <&emmc>; + #phy-cells = <0>; + }; + };