Message ID | 20240525171854.2165241-1-parthiban@linumiz.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/2] arm64: phygate-tauri-l enable pcie phy | expand |
On Sat, May 25, 2024 at 10:48:53PM +0530, Parthiban Nallathambi wrote: > I210 intel ethernet controller is connected to PCIe. Enable the PHY > to use the ethernet controller. > > Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> Subject prefix should be 'arm64: dts: phygate-tauri-l: ...' Fixed it up and applied both, thanks!
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts index 27a902569e2a..ba6ce3c7f477 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts @@ -7,6 +7,7 @@ #include <dt-bindings/input/linux-event-codes.h> #include <dt-bindings/leds/common.h> +#include <dt-bindings/phy/phy-imx8-pcie.h> #include "imx8mm-phycore-som.dtsi" / { @@ -185,6 +186,15 @@ &pcie0 { status = "okay"; }; +&pcie_phy { + clocks = <&clk IMX8MM_CLK_PCIE1_PHY>; + fsl,clkreq-unsupported; + fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>; + fsl,tx-deemph-gen1 = <0x2d>; + fsl,tx-deemph-gen2 = <0xf>; + status = "okay"; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>;
I210 intel ethernet controller is connected to PCIe. Enable the PHY to use the ethernet controller. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> --- .../boot/dts/freescale/imx8mm-phygate-tauri-l.dts | 10 ++++++++++ 1 file changed, 10 insertions(+)