From patchwork Tue Jun 4 13:05:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 13685273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 083CFC27C54 for ; Tue, 4 Jun 2024 13:06:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=W7OMzprbLP774MUf1DDljHVNVe6PTG18smKuWnmmIQU=; b=nZ19Hgw1z4RU7U VB5UIKfIKWA+kFZ1nNFiZh0+Z8b7nRW5vkpRfD6z1Y3FQQOX3XA/oO18pNChQgTPsG1Nz0Zpces7G CSQ/S+qX6zzi+nMu/GeXkpTQdBTp+Tjrhe0XORf2qfcs6u8wSlnO9qgdxNsyAapYjfZ19fMv8+b2L X19O/cdEeFPpfI2+twoDQ3fPxBRRJpnIQPktqYo8pc0CZjU5tV1GZFp0ADqbFDDG+PqUuU6QG3/HO Iry5ObcdRDxpR3YpjYdVwkUIuy7aYmMDkK+bWWLKozARa6BG3Oz5I8ORDYRGJK3TcDJ6FqMG6caQx UoBE0lh8cC8m7rii4nhg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sETrZ-00000002R6O-1rm9; Tue, 04 Jun 2024 13:06:05 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sETrW-00000002R3x-1Fma for linux-arm-kernel@lists.infradead.org; Tue, 04 Jun 2024 13:06:03 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id A67B7CE113C; Tue, 4 Jun 2024 13:06:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DC6A7C4AF09; Tue, 4 Jun 2024 13:05:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717506359; bh=dO+XJF3nG67IaCEKh9GyqHtcBuKo4Q0opdhUqxQxqTw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UrbEAVI+riz8pCuwSQlERH90z54PEMkp1QGJouQR7aVT70prddRrRa6p8OHoKUt8p L1KHvLZEgml6UybMWz2ibI2aSnjX4NCRTD6hDe1+CrCFYQ4ucN6DveQgsq38Ft0U4f 6DrCS44Wh95eAuI3ozC6Xf6vq1UygXgdHqrXVosXGIOVmCggEKs4Zw79SSDzlDpBFO aDYPp1jzjQdgaP1haAPvJcnqFIIB9zxKhUscJFaauLgKbADQdt7KXqTDV3dxGHB2+f YeFMMC3mpv/eP5KzZ/9bwudXUBttos/8oGSbfHVhICa/m5+vIU/CpCMX2KojnBMXiq LMrwy9DDqrsAQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sETrR-000ZSS-UM; Tue, 04 Jun 2024 14:05:58 +0100 From: Marc Zyngier To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Joey Gouly Subject: [PATCH 3/4] KVM: arm64: nv: Add additional trap setup for CPTR_EL2 Date: Tue, 4 Jun 2024 14:05:52 +0100 Message-Id: <20240604130553.199981-4-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240604130553.199981-1-maz@kernel.org> References: <20240604130553.199981-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, joey.gouly@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240604_060602_727735_DC2FD9C9 X-CRM114-Status: GOOD ( 20.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org We need to teach KVM a couple of new tricks. CPTR_EL2 and its VHE accessor CPACR_EL1 need to be handled specially: - CPACR_EL1 is trapped on VHE so that we can track the TCPAC and TTA bits - CPTR_EL2.{TCPAC,E0POE} are propagated from L1 to L2 As a consequence of CPTR_EL2 being always trapped, we update vcpu_sanitised_cptr_el2() so that it doesn't try to read from the CPU registers, but from the shadow copy (ensuring that we always have up-to-date TCPAC and TTA bits). This helper will also be used when handling the CPTR_EL1 trap. Signed-off-by: Marc Zyngier --- arch/arm64/include/asm/kvm_emulate.h | 2 +- arch/arm64/kvm/hyp/vhe/switch.c | 23 ++++++++++++++++++++++- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h index e86de04ba1c4..cc5c93b46e6f 100644 --- a/arch/arm64/include/asm/kvm_emulate.h +++ b/arch/arm64/include/asm/kvm_emulate.h @@ -607,7 +607,7 @@ static __always_inline void kvm_reset_cptr_el2(struct kvm_vcpu *vcpu) */ static inline u64 vcpu_sanitised_cptr_el2(const struct kvm_vcpu *vcpu) { - u64 cptr = vcpu_read_sys_reg(vcpu, CPTR_EL2); + u64 cptr = __vcpu_sys_reg(vcpu, CPTR_EL2); if (!vcpu_el2_e2h_is_set(vcpu)) cptr = translate_cptr_el2_to_cpacr_el1(cptr); diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c index d07b4f4be5e5..b4ba236526d6 100644 --- a/arch/arm64/kvm/hyp/vhe/switch.c +++ b/arch/arm64/kvm/hyp/vhe/switch.c @@ -67,6 +67,8 @@ static u64 __compute_hcr(struct kvm_vcpu *vcpu) static void __activate_cptr_traps(struct kvm_vcpu *vcpu) { + u64 cptr; + /* * With VHE (HCR.E2H == 1), accesses to CPACR_EL1 are routed to * CPTR_EL2. In general, CPACR_EL1 has the same layout as CPTR_EL2, @@ -85,11 +87,23 @@ static void __activate_cptr_traps(struct kvm_vcpu *vcpu) __activate_traps_fpsimd32(vcpu); } + if (!vcpu_has_nv(vcpu)) + goto write; + + /* + * The architecture is a bit crap (what a surprise): an EL2 guest + * writing to CPTR_EL2 via CPACR_EL1 can't set any of TCPAC or TTA, + * as they are RES0 in the guest's view. To work around it, trap the + * sucker using the very same bit it can't set... + */ + if (vcpu_el2_e2h_is_set(vcpu) && is_hyp_ctxt(vcpu)) + val |= CPTR_EL2_TCPAC; + /* * Layer the guest hypervisor's trap configuration on top of our own if * we're in a nested context. */ - if (!vcpu_has_nv(vcpu) || is_hyp_ctxt(vcpu)) + if (is_hyp_ctxt(vcpu)) goto write; if (guest_hyp_fpsimd_traps_enabled(vcpu)) @@ -97,6 +111,13 @@ static void __activate_cptr_traps(struct kvm_vcpu *vcpu) if (guest_hyp_sve_traps_enabled(vcpu)) val &= ~CPACR_ELx_ZEN; + cptr = vcpu_sanitised_cptr_el2(vcpu); + + if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR3_EL1, S2POE, IMP)) + val |= cptr & CPACR_ELx_E0POE; + + val |= cptr & CPTR_EL2_TCPAC; + write: write_sysreg(val, cpacr_el1); }