| Message ID | 20240605124859.3034-5-hnagalla@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add R5F and C7x DSP nodes for AM62a SoC | expand |
Hi Hari, On June 5, 2024 thus sayeth Hari Nagalla: > From: Devarsh Thakkar <devarsht@ti.com> > > Reserve memory for remote rpoc IPC and bind the mailbox assignments > for each remote proc. Two memory regions are reserved for each > remote processor. The first region of 1Mb of memory is used for Vring > shared buffers and the second region is used as external memory to the > remote processor, resource table and as tracebuffer. > > Signed-off-by: Devarsh Thakkar <devarsht@ti.com> > Signed-off-by: Hari Nagalla <hnagalla@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 68 +++++++++++++++++++++++++ > 1 file changed, 68 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > index fa43cd0b631e..09bb8af53b1e 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > @@ -52,11 +52,40 @@ secure_ddr: optee@9e800000 { > no-map; > }; > > + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9c800000 0x00 0x100000>; > + no-map; > + }; > + > wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { > compatible = "shared-dma-pool"; > reg = <0x00 0x9c900000 0x00 0x01e00000>; > no-map; > }; > + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b800000 0x00 0x100000>; > + no-map; > + }; > + > + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b900000 0x00 0x0f00000>; > + no-map; > + }; > + > + c7x_0_dma_memory_region: c7x-dma-memory@99800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x99800000 0x00 0x100000>; > + no-map; > + }; > + > + c7x_0_memory_region: c7x-memory@99900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x99900000 0x00 0x01efffff>; > + no-map; > + }; > }; This seems highly specific to the demos we're currently running for our reference boards. If someone wants to develop their own app say with Zypher they would instantly need to change this. If these absolutely need to be in here could they go in a TI-demo overly? ~Bryan
On 05/06/24 18:18, Hari Nagalla wrote: > From: Devarsh Thakkar <devarsht@ti.com> > > Reserve memory for remote rpoc IPC and bind the mailbox assignments > for each remote proc. Two memory regions are reserved for each > remote processor. The first region of 1Mb of memory is used for Vring s/1Mb/1MB? > shared buffers and the second region is used as external memory to the > remote processor, resource table and as tracebuffer. > > Signed-off-by: Devarsh Thakkar <devarsht@ti.com> > Signed-off-by: Hari Nagalla <hnagalla@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 68 +++++++++++++++++++++++++ > 1 file changed, 68 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > index fa43cd0b631e..09bb8af53b1e 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > @@ -52,11 +52,40 @@ secure_ddr: optee@9e800000 { > no-map; > }; > > + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9c800000 0x00 0x100000>; > + no-map; > + }; > + > wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { > compatible = "shared-dma-pool"; > reg = <0x00 0x9c900000 0x00 0x01e00000>; > no-map; > }; > + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b800000 0x00 0x100000>; > + no-map; > + }; > + > + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b900000 0x00 0x0f00000>; > + no-map; > + }; > + > + c7x_0_dma_memory_region: c7x-dma-memory@99800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x99800000 0x00 0x100000>; > + no-map; > + }; > + > + c7x_0_memory_region: c7x-memory@99900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x99900000 0x00 0x01efffff>; 0x01efffff -> are you sure this is correct? Just missing a byte to a nice round number size. looks like typo of using range vs size? > + no-map; > + }; > }; > > vmain_pd: regulator-0 { > @@ -721,3 +750,42 @@ dpi1_out: endpoint { > }; > }; > }; > + > +&mailbox0_cluster0 { > + mbox_r5_0: mbox-r5-0 { > + ti,mbox-rx = <0 0 0>; > + ti,mbox-tx = <1 0 0>; > + }; > +}; > + > +&mailbox0_cluster1 { > + mbox_c7x_0: mbox-c7x-0 { > + ti,mbox-rx = <0 0 0>; > + ti,mbox-tx = <1 0 0>; > + }; > +}; > + > +&mailbox0_cluster2 { > + mbox_mcu_r5_0: mbox-mcu-r5-0 { > + ti,mbox-rx = <0 0 0>; > + ti,mbox-tx = <1 0 0>; > + }; > +}; > + > +&c7x_0 { > + mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>; > + memory-region = <&c7x_0_dma_memory_region>, > + <&c7x_0_memory_region>; > +}; > + > +&wkup_r5fss0_core0 { > + mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>; > + memory-region = <&wkup_r5fss0_core0_dma_memory_region>, > + <&wkup_r5fss0_core0_memory_region>; > +}; > + > +&mcu_r5fss0_core0 { > + mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>; > + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, > + <&mcu_r5fss0_core0_memory_region>; > +};
On 6/6/24 12:16, Bryan Brattlof wrote: >> + >> + c7x_0_memory_region: c7x-memory@99900000 { >> + compatible = "shared-dma-pool"; >> + reg = <0x00 0x99900000 0x00 0x01efffff>; >> + no-map; >> + }; >> }; > This seems highly specific to the demos we're currently running for our > reference boards. If someone wants to develop their own app say with > Zypher they would instantly need to change this. > > If these absolutely need to be in here could they go in a TI-demo overly? > > ~Bryan Hey Bryan, You are correct, these carveouts match the TI provided firmware binaries. Ideally, these could go into an overlay. Just following the carveout model used with the rest of the TI SoCs (AM6x/J72x), to avoid confusion to the users.
On 6/10/24 02:02, Vignesh Raghavendra wrote: >> Reserve memory for remote rpoc IPC and bind the mailbox assignments >> for each remote proc. Two memory regions are reserved for each >> remote processor. The first region of 1Mb of memory is used for Vring > s/1Mb/1MB? > Yes, will correct it to 1MB. >> + reg = <0x00 0x99900000 0x00 0x01efffff>; > 0x01efffff -> are you sure this is correct? Just missing a byte to a > nice round number size. looks like typo of using range vs size? > You are right. Will round it to 0x01f00000.
On June 10, 2024 thus sayeth Hari Nagalla: > On 6/6/24 12:16, Bryan Brattlof wrote: > > > + > > > + c7x_0_memory_region: c7x-memory@99900000 { > > > + compatible = "shared-dma-pool"; > > > + reg = <0x00 0x99900000 0x00 0x01efffff>; > > > + no-map; > > > + }; > > > }; > > This seems highly specific to the demos we're currently running for our > > reference boards. If someone wants to develop their own app say with > > Zypher they would instantly need to change this. > > > > If these absolutely need to be in here could they go in a TI-demo overly? > > > > ~Bryan > Hey Bryan, > You are correct, these carveouts match the TI provided firmware binaries. > Ideally, these could go into an overlay. Just following the carveout model > used with the rest of the TI SoCs (AM6x/J72x), to avoid confusion to the > users. Ah yeah, I was planning to rip those out too ;) My idea was to throw them into our SDK layers so that other distros don't have to work around them anymore. This also gives the maintainers of those meta- layers the control of the reserved-memory{} node so they can carve it up or move it around as they need along with the firmware they build. ~Bryan
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index fa43cd0b631e..09bb8af53b1e 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -52,11 +52,40 @@ secure_ddr: optee@9e800000 { no-map; }; + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9c800000 0x00 0x100000>; + no-map; + }; + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c900000 0x00 0x01e00000>; no-map; }; + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9b800000 0x00 0x100000>; + no-map; + }; + + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9b900000 0x00 0x0f00000>; + no-map; + }; + + c7x_0_dma_memory_region: c7x-dma-memory@99800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x99800000 0x00 0x100000>; + no-map; + }; + + c7x_0_memory_region: c7x-memory@99900000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x99900000 0x00 0x01efffff>; + no-map; + }; }; vmain_pd: regulator-0 { @@ -721,3 +750,42 @@ dpi1_out: endpoint { }; }; }; + +&mailbox0_cluster0 { + mbox_r5_0: mbox-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster1 { + mbox_c7x_0: mbox-c7x-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster2 { + mbox_mcu_r5_0: mbox-mcu-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&c7x_0 { + mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>; + memory-region = <&c7x_0_dma_memory_region>, + <&c7x_0_memory_region>; +}; + +&wkup_r5fss0_core0 { + mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>; + memory-region = <&wkup_r5fss0_core0_dma_memory_region>, + <&wkup_r5fss0_core0_memory_region>; +}; + +&mcu_r5fss0_core0 { + mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>; + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; +};