diff mbox series

arm64: dts: ti: k3-am642-evm: Enable "SYNC_OUT0" output

Message ID 20240614100829.3919008-1-danishanwar@ti.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: ti: k3-am642-evm: Enable "SYNC_OUT0" output | expand

Commit Message

MD Danish Anwar June 14, 2024, 10:08 a.m. UTC
The IEP0 SYNC_OUT0 pins are used for PPS out on AM64 EVM.
Configure its PINMUX here.

Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am642-evm.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)


base-commit: 6906a84c482f098d31486df8dc98cead21cce2d0

Comments

Vignesh Raghavendra June 21, 2024, 3:13 p.m. UTC | #1
Hi MD Danish Anwar,

On Fri, 14 Jun 2024 15:38:29 +0530, MD Danish Anwar wrote:
> The IEP0 SYNC_OUT0 pins are used for PPS out on AM64 EVM.
> Configure its PINMUX here.
> 
> 

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/1] arm64: dts: ti: k3-am642-evm: Enable "SYNC_OUT0" output
      commit: 5fb89782a9e94936c14f2621637ef9df7c4ac0f0

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

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[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index e20e4ffd0f1f..3256f5305a8f 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -466,6 +466,12 @@  AM64X_IOPAD(0x00f8, PIN_INPUT, 2) /* (V9) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
 			AM64X_IOPAD(0x00f4, PIN_INPUT, 2) /* (Y9) PRG1_PRU0_GPO15.PRG1_RGMII1_TX_CTL */
 		>;
 	};
+
+	icssg1_iep0_pins_default: icssg1-iep0-default-pins {
+		pinctrl-single,pins = <
+			AM64X_IOPAD(0x0104, PIN_OUTPUT, 2) /* (W7) PRG1_PRU0_GPO19.PRG1_IEP0_EDC_SYNC_OUT0 */
+		>;
+	};
 };
 
 &main_uart0 {
@@ -817,3 +823,8 @@  icssg1_phy1: ethernet-phy@f {
 		rx-internal-delay-ps = <2000>;
 	};
 };
+
+&icssg1_iep0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&icssg1_iep0_pins_default>;
+};