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Sat, 15 Jun 2024 03:16:40 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 15 Jun 2024 03:16:40 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 15 Jun 2024 03:16:40 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45F8G1Qc024463; Sat, 15 Jun 2024 03:16:36 -0500 From: Siddharth Vadapalli To: , , , , , , , CC: , , , , , , Subject: [PATCH v7 8/8] arm64: dts: ti: k3-am62p-j722s: Move SoC-specific node properties Date: Sat, 15 Jun 2024 13:46:00 +0530 Message-ID: <20240615081600.3602462-9-s-vadapalli@ti.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240615081600.3602462-1-s-vadapalli@ti.com> References: <20240615081600.3602462-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240615_091658_181682_91942F30 X-CRM114-Status: GOOD ( 10.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Certain device-tree node properties of shared device-tree nodes are different between the AM62P and J722S SoCs. To avoid overriding the properties and to avoid redefining the nodes in the k3-{soc}-main.dtsi having such SoC specific properties, move the properties to the SoC specific k3-{soc}-main.dtsi files. Signed-off-by: Siddharth Vadapalli Acked-by: Roger Quadros --- This patch has been introduced in this series and hence doesn't have a Changelog. This patch replaces the v6 patch: arm64: dts: ti: k3-j722s: Move MAIN domain overrides to k3-j722s-main.dtsi based on Roger's suggestion at: https://lore.kernel.org/r/d4c33ee4-1e91-40e5-90c8-bd793bcf34ff@kernel.org/ .../dts/ti/k3-am62p-j722s-common-main.dtsi | 5 ----- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 17 +++++++++++++++++ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 17 +++++++++++++++++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 19 ------------------- 4 files changed, 34 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi index 870c95081ef5..e787f9386eb5 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi @@ -8,10 +8,8 @@ &cbass_main { oc_sram: sram@70000000 { compatible = "mmio-sram"; - reg = <0x00 0x70000000 0x00 0x10000>; #address-cells = <1>; #size-cells = <1>; - ranges = <0x00 0x00 0x70000000 0x10000>; }; gic500: interrupt-controller@1800000 { @@ -92,7 +90,6 @@ inta_main_dmss: interrupt-controller@48000000 { msi-controller; ti,sci = <&dmsc>; ti,sci-dev-id = <28>; - ti,interrupt-ranges = <5 69 35>; ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>; }; @@ -539,7 +536,6 @@ main_gpio0: gpio@600000 { <193>, <194>, <195>; interrupt-controller; #interrupt-cells = <2>; - ti,ngpio = <92>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 77 0>; @@ -556,7 +552,6 @@ main_gpio1: gpio@601000 { <183>, <184>, <185>; interrupt-controller; #interrupt-cells = <2>; - ti,ngpio = <52>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 78 0>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi index 9caab7db5440..f8a7f0cbd327 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -32,3 +32,20 @@ usb1: usb@31100000 { }; }; }; + +&oc_sram { + reg = <0x00 0x70000000 0x00 0x10000>; + ranges = <0x00 0x00 0x70000000 0x10000>; +}; + +&inta_main_dmss { + ti,interrupt-ranges = <5 69 35>; +}; + +&main_gpio0 { + ti,ngpio = <92>; +}; + +&main_gpio1 { + ti,ngpio = <52>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi index b16f3a7cb109..228c6c89245c 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -171,3 +171,20 @@ pcie0_ctrl: pcie0-ctrl@4070 { reg = <0x4070 0x4>; }; }; + +&oc_sram { + reg = <0x00 0x70000000 0x00 0x40000>; + ranges = <0x00 0x00 0x70000000 0x40000>; +}; + +&inta_main_dmss { + ti,interrupt-ranges = <7 71 21>; +}; + +&main_gpio0 { + ti,ngpio = <87>; +}; + +&main_gpio1 { + ti,ngpio = <73>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi index 705b99e35f05..14c6c6a332ef 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -232,22 +232,3 @@ cbass_wakeup: bus@b00000 { /* Include J722S specific peripherals */ #include "k3-j722s-main.dtsi" - -/* Main domain overrides */ - -&inta_main_dmss { - ti,interrupt-ranges = <7 71 21>; -}; - -&main_gpio0 { - ti,ngpio = <87>; -}; - -&main_gpio1 { - ti,ngpio = <73>; -}; - -&oc_sram { - reg = <0x00 0x70000000 0x00 0x40000>; - ranges = <0x00 0x00 0x70000000 0x40000>; -};