From patchwork Mon Jun 17 09:14:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Etienne CARRIERE - foss X-Patchwork-Id: 13700377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45E05C27C6E for ; Mon, 17 Jun 2024 09:16:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=JLZNH/a/eRZb9WCTFRGCBRv/iJv/oPGQFOGXRp2/VCg=; b=dKZ95Z+0wgtZKXEsPpYcMLV77X bXbhPmkFA2FzG/4MR8VtJ7WxAzKK+xsN7QcEI7XN8jV8ofuTaDOLGLyeeKy0F85riGZGQ8hXoTIj1 TT0HgKerW4lwZaOu011BtjZZt9gPhJD7vGUFeBx6Q62z6/RvfMovGWZSmkVHVNOHaDfttTcazrUIE ikArimhyh5Y3s7f1dNyiNg1IC5dQFd4QH8AY7/8hwZ4omLfDyYtOujno472Mz823u7mlyzVPDPVYT iaBz8FhmrdtUGj7AUBfi9GR0VneWIWgAG4hXxK48Qb2HO9YwuulkYRIfXbAdhHb6P9Bp+zUDqCbYQ bNvD5z3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJ8Sw-00000009zpf-1QvA; Mon, 17 Jun 2024 09:15:54 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJ8SN-00000009zUX-0gKz for linux-arm-kernel@lists.infradead.org; Mon, 17 Jun 2024 09:15:25 +0000 Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45H89GsN019515; Mon, 17 Jun 2024 11:15:00 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=selector1; bh=JLZNH/a/eRZb9WCTFRGCBR v/iJv/oPGQFOGXRp2/VCg=; b=z2u0DRU9HQmuiuWyqdfbGEB8Xnse3uxfsaYDNs xtyMikRXZrngqMK1w4ugFCFLR71TUMhG4N+5u9DPgb0j/6YWbC5565HrD2vh4PAR /HFuD0nDAaKUy3N9bOrPmv8HTZTK9ztkLAN3kOJScjTLaAGNR56jJZz8jThzmawW enjm8Ax4GJO5ffOhBWkLlnfHCeg8E3Xls5T4YfWWe8iQ8IVpIKAkeRPLRKja/MDP tGUCKGpssHy6CZZgK0lj8XpLD/7EgSKyvZrlSP+CYRVF3kguxDf3OmzGMjTxKR0o OPdLmJQRg24r5+OQNQoH8MlM5oWPGsyDHGlsiowI4POA3Bug== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3ysnwj3ksc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 17 Jun 2024 11:15:00 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 2792F40050; Mon, 17 Jun 2024 11:14:55 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 36191211613; Mon, 17 Jun 2024 11:14:21 +0200 (CEST) Received: from localhost (10.48.86.128) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 17 Jun 2024 11:14:20 +0200 From: Etienne Carriere To: CC: , , , Alexandre Torgue , Maxime Coquelin , Conor Dooley , Krzysztof Kozlowski , Rob Herring , Etienne Carriere Subject: [PATCH] ARM: dts: stm32: OP-TEE async notif interrupt for ST STM32MP15x boards Date: Mon, 17 Jun 2024 11:14:18 +0200 Message-ID: <20240617091418.2956380-1-etienne.carriere@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.48.86.128] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-17_08,2024-06-14_03,2024-05-17_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240617_021519_868220_C382406F X-CRM114-Status: UNSURE ( 8.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Define the GIC interrupt (PPI 15) to be used on ST STM32MP15x boards for OP-TEE async notif. Signed-off-by: Etienne Carriere --- arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts | 5 +++++ arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts | 5 +++++ arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts | 5 +++++ arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts | 5 +++++ 4 files changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts index 306e1bc2a514..847b360f02fc 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts @@ -62,6 +62,11 @@ &m4_rproc { reset-names = "mcu_rst", "hold_boot"; }; +&optee { + interrupt-parent = <&intc>; + interrupts = ; +}; + &rcc { compatible = "st,stm32mp1-rcc-secure", "syscon"; clock-names = "hse", "hsi", "csi", "lse", "lsi"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts index 956da5f26c1c..43280289759d 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts @@ -68,6 +68,11 @@ &m4_rproc { reset-names = "mcu_rst", "hold_boot"; }; +&optee { + interrupt-parent = <&intc>; + interrupts = ; +}; + &rcc { compatible = "st,stm32mp1-rcc-secure", "syscon"; clock-names = "hse", "hsi", "csi", "lse", "lsi"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts index 8e4b0db198c2..6f27d794d270 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts @@ -67,6 +67,11 @@ &m4_rproc { reset-names = "mcu_rst", "hold_boot"; }; +&optee { + interrupt-parent = <&intc>; + interrupts = ; +}; + &rcc { compatible = "st,stm32mp1-rcc-secure", "syscon"; clock-names = "hse", "hsi", "csi", "lse", "lsi"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts index 72b9cab2d990..6ae391bffee5 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts @@ -72,6 +72,11 @@ &m4_rproc { reset-names = "mcu_rst", "hold_boot"; }; +&optee { + interrupt-parent = <&intc>; + interrupts = ; +}; + &rcc { compatible = "st,stm32mp1-rcc-secure", "syscon"; clock-names = "hse", "hsi", "csi", "lse", "lsi";