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We considered using 'family' but this conflicts with Broadcom's conception of a family; for example, 7216a0 and 7216b0 chips are both considered separate families as each has multiple derivative product chips based on the original design. Signed-off-by: Jim Quinlan --- drivers/pci/controller/pcie-brcmstb.c | 48 +++++++++++++-------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index 39d7dea282ff..3ab35d3dbe36 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -211,7 +211,7 @@ enum { PCIE_INTR2_CPU_BASE, }; -enum pcie_type { +enum pcie_model { GENERIC, BCM7425, BCM7435, @@ -229,7 +229,7 @@ struct rc_bar { struct pcie_cfg_data { const int *offsets; - const enum pcie_type type; + const enum pcie_model model; const bool has_phy; void (*perst_set)(struct brcm_pcie *pcie, u32 val); void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val); @@ -269,7 +269,7 @@ struct brcm_pcie { u64 msi_target_addr; struct brcm_msi *msi; const int *reg_offsets; - enum pcie_type type; + enum pcie_model model; struct reset_control *rescal; struct reset_control *perst_reset; struct reset_control *bridge; @@ -287,7 +287,7 @@ struct brcm_pcie { static inline bool is_bmips(const struct brcm_pcie *pcie) { - return pcie->type == BCM7435 || pcie->type == BCM7425; + return pcie->model == BCM7435 || pcie->model == BCM7425; } /* @@ -842,7 +842,7 @@ static int brcm_pcie_get_rc_bar_sizes_and_offsets(struct brcm_pcie *pcie, * to system memory but to a regiion all of the SOC registers. No * one uses this anymore. */ - if (pcie->type != BCM7712) + if (pcie->model != BCM7712) set_bar(b++, &n, 0, 0, 0); resource_list_for_each_entry(entry, &bridge->dma_ranges) { @@ -859,7 +859,7 @@ static int brcm_pcie_get_rc_bar_sizes_and_offsets(struct brcm_pcie *pcie, * That being said, each BARs size must still be a power of * two. */ - if (pcie->type == BCM7712) + if (pcie->model == BCM7712) set_bar(b++, &n, size, cpu_beg, pcie_beg); if (n > pcie->num_inbound) @@ -876,7 +876,7 @@ static int brcm_pcie_get_rc_bar_sizes_and_offsets(struct brcm_pcie *pcie, * that enables multiple memory controllers. As such, it can return * now w/o doing special configuration. */ - if (pcie->type == BCM7712) + if (pcie->model == BCM7712) return n; ret = of_property_read_variable_u64_array(pcie->np, "brcm,scb-sizes", pcie->memc_size, 1, @@ -985,7 +985,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie) pcie->bridge_sw_init_set(pcie, 1); /* Ensure that PERST# is asserted; some bootloaders may deassert it. */ - if (pcie->type == BCM2711) + if (pcie->model == BCM2711) pcie->perst_set(pcie, 1); usleep_range(100, 200); @@ -1009,9 +1009,9 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie) */ if (is_bmips(pcie)) burst = 0x1; /* 256 bytes */ - else if (pcie->type == BCM2711) + else if (pcie->model == BCM2711) burst = 0x0; /* 128 bytes */ - else if (pcie->type == BCM7278) + else if (pcie->model == BCM7278) burst = 0x3; /* 512 bytes */ else burst = 0x2; /* 512 bytes */ @@ -1054,7 +1054,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie) * 7712: * All of their BARs need to be set. */ - if (pcie->type == BCM7712) { + if (pcie->model == BCM7712) { /* BUS remap register settings */ reg_offset = brcm_calc_ubus_reg_offset(i); tmp = lower_32_bits(cpu_addr) & ~0xfff; @@ -1217,7 +1217,7 @@ static void brcm_config_clkreq(struct brcm_pcie *pcie) */ clkreq_cntl |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_L1SS_ENABLE_MASK; /* 7712 does not have this (RGR1) timer */ - if (pcie->type != BCM7712) + if (pcie->model != BCM7712) brcm_extend_rbus_timeout(pcie); } else { @@ -1639,28 +1639,28 @@ static const int pcie_offset_bcm7712[] = { static const struct pcie_cfg_data generic_cfg = { .offsets = pcie_offsets, - .type = GENERIC, + .model = GENERIC, .perst_set = brcm_pcie_perst_set_generic, .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, }; static const struct pcie_cfg_data bcm7425_cfg = { .offsets = pcie_offsets_bmips_7425, - .type = BCM7425, + .model = BCM7425, .perst_set = brcm_pcie_perst_set_generic, .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, }; static const struct pcie_cfg_data bcm7435_cfg = { .offsets = pcie_offsets, - .type = BCM7435, + .model = BCM7435, .perst_set = brcm_pcie_perst_set_generic, .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, }; static const struct pcie_cfg_data bcm4908_cfg = { .offsets = pcie_offsets, - .type = BCM4908, + .model = BCM4908, .perst_set = brcm_pcie_perst_set_4908, .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, }; @@ -1675,21 +1675,21 @@ static const int pcie_offset_bcm7278[] = { static const struct pcie_cfg_data bcm7278_cfg = { .offsets = pcie_offset_bcm7278, - .type = BCM7278, + .model = BCM7278, .perst_set = brcm_pcie_perst_set_7278, .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_7278, }; static const struct pcie_cfg_data bcm2711_cfg = { .offsets = pcie_offsets, - .type = BCM2711, + .model = BCM2711, .perst_set = brcm_pcie_perst_set_generic, .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, }; static const struct pcie_cfg_data bcm7216_cfg = { .offsets = pcie_offset_bcm7278, - .type = BCM7278, + .model = BCM7278, .perst_set = brcm_pcie_perst_set_7278, .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_7278, .has_phy = true, @@ -1699,7 +1699,7 @@ static const struct pcie_cfg_data bcm7712_cfg = { .offsets = pcie_offset_bcm7712, .perst_set = brcm_pcie_perst_set_7278, .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, - .type = BCM7712, + .model = BCM7712, }; static const struct of_device_id brcm_pcie_match[] = { @@ -1753,11 +1753,11 @@ static int brcm_pcie_probe(struct platform_device *pdev) pcie->dev = &pdev->dev; pcie->np = np; pcie->reg_offsets = data->offsets; - pcie->type = data->type; + pcie->model = data->model; pcie->perst_set = data->perst_set; pcie->bridge_sw_init_set = data->bridge_sw_init_set; pcie->has_phy = data->has_phy; - pcie->num_inbound = (pcie->type == BCM7712) ? 10 : 3; + pcie->num_inbound = (pcie->model == BCM7712) ? 10 : 3; pcie->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(pcie->base)) @@ -1828,7 +1828,7 @@ static int brcm_pcie_probe(struct platform_device *pdev) goto fail; pcie->hw_rev = readl(pcie->base + PCIE_MISC_REVISION); - if (pcie->type == BCM4908 && pcie->hw_rev >= BRCM_PCIE_HW_REV_3_20) { + if (pcie->model == BCM4908 && pcie->hw_rev >= BRCM_PCIE_HW_REV_3_20) { dev_err(pcie->dev, "hardware revision with unsupported PERST# setup\n"); ret = -ENODEV; goto fail; @@ -1843,7 +1843,7 @@ static int brcm_pcie_probe(struct platform_device *pdev) } } - bridge->ops = pcie->type == BCM7425 ? &brcm7425_pcie_ops : &brcm_pcie_ops; + bridge->ops = pcie->model == BCM7425 ? &brcm7425_pcie_ops : &brcm_pcie_ops; bridge->sysdata = pcie; platform_set_drvdata(pdev, pcie);