@@ -320,7 +320,7 @@ AM64X_IOPAD(0x0278, PIN_INPUT, 7) /* EXTINTn.GPIO1_70 */
ethernet_phy0_default_pins: ethernet-phy0-default-pins {
pinctrl-single,pins = <
/* reset */
- AM64X_IOPAD(0x0154, PIN_OUTPUT, 7) /* PRG1_PRU1_GPO19.GPIO0_84 */
+ AM64X_IOPAD(0x0154, PIN_INPUT, 7) /* PRG1_PRU1_GPO19.GPIO0_84 */
/* reference clock */
AM64X_IOPAD(0x0274, PIN_OUTPUT, 5) /* EXT_REFCLK1.CLKOUT0 */
>;
@@ -329,7 +329,7 @@ AM64X_IOPAD(0x0274, PIN_OUTPUT, 5) /* EXT_REFCLK1.CLKOUT0 */
ethernet_phy1_default_pins: ethernet-phy1-default-pins {
pinctrl-single,pins = <
/* reset */
- AM64X_IOPAD(0x0150, PIN_OUTPUT, 7) /* PRG1_PRU1_GPO18.GPIO0_20 */
+ AM64X_IOPAD(0x0150, PIN_INPUT, 7) /* PRG1_PRU1_GPO18.GPIO0_20 */
/* led0, external pull-down on SoM */
AM64X_IOPAD(0x0128, PIN_INPUT, 7) /* PRG1_PRU1_GPO8.GPIO0_73 */
/* led1/rxer */
@@ -340,7 +340,7 @@ AM64X_IOPAD(0x011c, PIN_INPUT, 7) /* PRG1_PRU1_GPO5.GPIO0_70 */
ethernet_phy2_default_pins: ethernet-phy2-default-pins {
pinctrl-single,pins = <
/* reset */
- AM64X_IOPAD(0x00d4, PIN_OUTPUT, 7) /* PRG1_PRU0_GPO7.GPIO0_52 */
+ AM64X_IOPAD(0x00d4, PIN_INPUT, 7) /* PRG1_PRU0_GPO7.GPIO0_52 */
/* led0, external pull-down on SoM */
AM64X_IOPAD(0x00d8, PIN_INPUT, 7) /* PRG1_PRU0_GPO8.GPIO0_53 */
/* led1/rxer */
Specifically on AM64 SoM design, the DP83869 phys have a chance to lock up if reset gpio are toggled. Update the pinmux to input-only, strongly enforcing that these signals are left floating at all times. This avoids sporadic phy initialisation errors mostly encountered during power-on and reset. Signed-off-by: Josua Mayer <josua@solid-run.com> --- arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) --- base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 change-id: 20240704-am64-phy-lockup-107ea5ffa228 Sincerely,