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Date: Fri, 5 Jul 2024 17:00:47 +0800 Message-ID: <20240705090049.1656986-3-quic_jiegan@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240705090049.1656986-1-quic_jiegan@quicinc.com> References: <20240705090049.1656986-1-quic_jiegan@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: AQG-K1uGekS1lbF1RPoeHsX9oFxJJ25T X-Proofpoint-GUID: AQG-K1uGekS1lbF1RPoeHsX9oFxJJ25T X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-05_05,2024-07-03_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 adultscore=1 mlxlogscore=999 lowpriorityscore=0 mlxscore=0 clxscore=1015 suspectscore=0 impostorscore=0 malwarescore=0 bulkscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407050067 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240705_020129_913350_B5D6907F X-CRM114-Status: GOOD ( 13.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add binding document for Coresight Control Unit device. Signed-off-by: Jie Gan --- .../bindings/arm/qcom,coresight-ccu.yaml | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml new file mode 100644 index 000000000000..9bb8ced393a7 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom,coresight-ccu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CoreSight Control Unit + +maintainers: + - Yuanfang Zhang + - Mao Jinlong + - Jie Gan + +description: + The Coresight Control unit controls various Coresight behaviors. + Used to enable/disable ETR’s data filter function based on trace ID. + +properties: + compatible: + const: qcom,coresight-ccu + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + + reg-names: + items: + - const: ccu-base + + in-ports: + $ref: /schemas/graph.yaml#/properties/ports + + unevaluatedProperties: + patternProperties: + '^port(@[0-7])?$': + description: Input connections from CoreSight Trace bus + $ref: /schemas/graph.yaml#/properties/port + + properties: + qcom,ccu-atid-offset: + description: + Offset to the Coresight Control Unit component's ATID register + that is used by specific TMC ETR. The ATID register can be programed based + on the trace id to filter out specific trace data which gets into ETR buffer. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + - in-ports + +additionalProperties: false + +examples: + - | + syscon@1001000 { + compatible = "qcom,coresight-ccu"; + reg = <0x1001000 0x1000>; + reg-names = "ccu-base"; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + ccu_in_port0: endpoint { + qcom,ccu-atid-offset = <0x1f>; + remote-endpoint = <&etr0_out_port>; + }; + }; + + port@1 { + reg = <1>; + ccu_in_port1: endpoint { + qcom,ccu-atid-offset = <0x2f>; + remote-endpoint = <&etr1_out_port>; + }; + }; + }; + };