diff mbox series

[v1,4/4] arm64: dts: mediatek: mt7988: add syscon for watchdog, xfi-pll and ethwarp

Message ID 20240709101328.102969-5-linux@fw-web.de (mailing list archive)
State New, archived
Headers show
Series add syscon requirement for mt7988 | expand

Commit Message

Frank Wunderlich July 9, 2024, 10:13 a.m. UTC 
From: Frank Wunderlich <frank-w@public-files.de>

This is needed by u-boot-driver when using OF_UPSTREAM.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
index 9ced005b1595..abde2719c34d 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
@@ -93,7 +93,7 @@  topckgen: clock-controller@1001b000 {
 		};
 
 		watchdog: watchdog@1001c000 {
-			compatible = "mediatek,mt7988-wdt";
+			compatible = "mediatek,mt7988-wdt", "syscon";
 			reg = <0 0x1001c000 0 0x1000>;
 			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 			#reset-cells = <1>;
@@ -192,7 +192,7 @@  ssusb1: usb@11200000 {
 		};
 
 		xfi_pll: clock-controller@11f40000 {
-			compatible = "mediatek,mt7988-xfi-pll";
+			compatible = "mediatek,mt7988-xfi-pll", "syscon";
 			reg = <0 0x11f40000 0 0x1000>;
 			resets = <&watchdog 16>;
 			#clock-cells = <1>;
@@ -206,7 +206,7 @@  ethsys: clock-controller@15000000 {
 		};
 
 		ethwarp: clock-controller@15031000 {
-			compatible = "mediatek,mt7988-ethwarp";
+			compatible = "mediatek,mt7988-ethwarp", "syscon";
 			reg = <0 0x15031000 0 0x1000>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;