From patchwork Mon Jul 29 14:20:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13745079 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE7F1C3DA61 for ; Mon, 29 Jul 2024 14:34:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bhHLsIpdGYfQTXJIMda4RgH3fpRoHJARlbP68m37GfE=; b=2sUzHYvywApHOfkmzyAKUjzPeu +dXcuGdF1XSydoJFePVu7vwd5n1Ti6rHyl6CDMyWBRfbyAefytguAUPJijh7kNgFDL7Bi5k2KRpYs ENSzQQbNun6W/fkj7YezaGvnucj6VOzAlk7WHBVznA4/NPsSi+1vXjN9vENSE8TfIDsdarHAwxq/h DAEsL9pf3s534zVnKzOR9MG+f9apyrFoKPvCtMHcd0/4NjqSyu1q40wG2CXUfFc0lL/Bj+UEe/wlk FP1pSBpFbDng8WCYh4EJHvaxw6otcSyT9ilmcWMpmvf5GqoOxdnMXhqWwnoKEkEbtx2r/TAmtpajf WS/EDoNw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYRSZ-0000000Bdgt-1VIQ; Mon, 29 Jul 2024 14:34:47 +0000 Received: from relay1-d.mail.gandi.net ([217.70.183.193]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYRFq-0000000BXoo-0ywv for linux-arm-kernel@lists.infradead.org; Mon, 29 Jul 2024 14:21:40 +0000 Received: by mail.gandi.net (Postfix) with ESMTPA id 2D9C224000C; Mon, 29 Jul 2024 14:21:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1722262896; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bhHLsIpdGYfQTXJIMda4RgH3fpRoHJARlbP68m37GfE=; b=hKlLMA4IU2x2n4HBnN8iY1/eRzSEa9AHf091qccnEmtNIN3SS8Cy9pAUkPFlMnxxogYPJH KaEwDYnak3jkd4o7iDYstR9YRCS3Z4P4oH1r7MH+HwNRbwG151zDrYaYJsvI3DCEFd62jn qprtEcjYOP3Fob+Y9itQgMJpBWwaaXkkzzQ0a0s8xXjKvWxbxDIeimJEfgYNSOjQqZSu7h k1oYN0go0dSGnLEE46HSRIv47MTW75qkL1vU4eMhGPNZDgPrb24V3Z3dzIAZkheQOZnbvM HAwdvDtENW1Hh9PxdjVQfBqIQv/Q/hEczZsoE0Oy/SmLRDJ1XCVm4j75hQTDjA== From: Herve Codina To: Herve Codina , Christophe Leroy , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Qiang Zhao , Li Yang , Mark Brown Cc: linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Petazzoni Subject: [PATCH v1 30/36] soc: fsl: cpm1: qmc: Rename SCC_GSMRL_MODE_QMC Date: Mon, 29 Jul 2024 16:20:59 +0200 Message-ID: <20240729142107.104574-31-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240729142107.104574-1-herve.codina@bootlin.com> References: <20240729142107.104574-1-herve.codina@bootlin.com> MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240729_072138_534768_C486FC17 X-CRM114-Status: GOOD ( 12.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Current code handles CPM1 version of QMC. Even if GSMRL is specific to the CPM1 version, the exact same purpose and format register (GUMRL) is present in the QUICC Engine (QE) version of QMC. Compared to the QE version, the values defined for the mode bitfield are different and the 0x0A value defined for the QMC mode is CPM1 specific. In order to prepare the support for the QE version, rename this bitfield value to clearly identify it as CPM1 specific. Signed-off-by: Herve Codina --- drivers/soc/fsl/qe/qmc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c index 63af2608c3cd..062477b7426e 100644 --- a/drivers/soc/fsl/qe/qmc.c +++ b/drivers/soc/fsl/qe/qmc.c @@ -27,7 +27,7 @@ #define SCC_GSMRL_ENR BIT(5) #define SCC_GSMRL_ENT BIT(4) #define SCC_GSMRL_MODE_MASK GENMASK(3, 0) -#define SCC_GSMRL_MODE_QMC FIELD_PREP_CONST(SCC_GSMRL_MODE_MASK, 0x0A) +#define SCC_CPM1_GSMRL_MODE_QMC FIELD_PREP_CONST(SCC_GSMRL_MODE_MASK, 0x0A) /* SCC general mode register low (32 bits) */ #define SCC_GSMRH 0x04 @@ -1642,7 +1642,7 @@ static int qmc_cpm1_init_scc(struct qmc *qmc) qmc_write32(qmc->scc_regs + SCC_GSMRH, val); /* enable QMC mode */ - qmc_write32(qmc->scc_regs + SCC_GSMRL, SCC_GSMRL_MODE_QMC); + qmc_write32(qmc->scc_regs + SCC_GSMRL, SCC_CPM1_GSMRL_MODE_QMC); /* Disable and clear interrupts */ qmc_write16(qmc->scc_regs + SCC_SCCM, 0x0000);