From patchwork Fri Aug 2 05:36:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 13751117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24DE4C52D70 for ; Fri, 2 Aug 2024 05:38:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=21uSmggtGjSSVl6e7jX24nwcCPrx0PnGnisi64/bATE=; b=rnr557hKhSmirClkTeqt5qmkb3 3fbe+pbjuOowMgewYmxzzsG2Hnoh6KR6nF5NkGSI1DJYSQziyiqboQj59UX9hTdGQRIyCzJPnzAdE qEDr4U0LuFqgCasXmMCMyobetkn3FwkC4Ju0VJO9uCMb5HmXrXUXjoPnongtn8LfMYiPu8YzANkLJ VPkX2GUXR5MHN1Jq/whL3NhIHH7MjjAZ7IzbI+3Y87pJG1AWfCOnJRPRfZ52dZ9YKN89tF8e0k5df /CEM2nxID8Lr8GrRzTBoRNMmsHBkD5PaudPLy87mDMLAYIA/6Y+fkF9ny/+wlMOagwYgZ7QI1BLme NZmvYFOg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZkz8-00000007i2w-0SsD; Fri, 02 Aug 2024 05:37:50 +0000 Received: from pi.codeconstruct.com.au ([203.29.241.158] helo=codeconstruct.com.au) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZkyB-00000007hpU-0qbI for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2024 05:36:53 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=codeconstruct.com.au; s=2022a; t=1722577008; bh=21uSmggtGjSSVl6e7jX24nwcCPrx0PnGnisi64/bATE=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=BrsLvjTSbq/dLJDxRJrGY8ZONIDIrNmWysoYOSZXq0D6gRbk9noL/m8qF3SV9Pxu3 rTZH0nTLNKlc6foMcgjLwdahCjWNv7LHRY+2OpIfULzBu4p6nfD0MQYgOGUjyZlSpr QG6gJpvH5EfR7ok0Mx6Wkv8PQpKYl/FrYYhnGjshNP1HJN9TyvqRNMo368KIqPaAP5 AlovjGXWRvUrRhzhv2jlsNKkiR8dmXiEubwhAE6i8RyEG4B3uSD4sxkHlPaOW/6c2N O3VYItOJAzfTD8Czv+ZAEUKvomQLL+HF1zgL/7YLeSvFJUJpwolV9azWSGoTc5QcuU IfbhG54tYwkxw== Received: from [127.0.1.1] (ppp118-210-29-70.adl-adc-lon-bras31.tpg.internode.on.net [118.210.29.70]) by mail.codeconstruct.com.au (Postfix) with ESMTPSA id 4776E66CBD; Fri, 2 Aug 2024 13:36:48 +0800 (AWST) From: Andrew Jeffery Date: Fri, 02 Aug 2024 15:06:30 +0930 Subject: [PATCH 1/2] dt-bindings: interrupt-controller: aspeed,ast2400-vic: Convert to DT schema MIME-Version: 1.0 Message-Id: <20240802-dt-warnings-irq-aspeed-dt-schema-v1-1-8cd4266d2094@codeconstruct.com.au> References: <20240802-dt-warnings-irq-aspeed-dt-schema-v1-0-8cd4266d2094@codeconstruct.com.au> In-Reply-To: <20240802-dt-warnings-irq-aspeed-dt-schema-v1-0-8cd4266d2094@codeconstruct.com.au> To: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org X-Mailer: b4 0.14.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240801_223651_500715_BF10950E X-CRM114-Status: GOOD ( 16.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Squash warnings such as: arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: /ahb/interrupt-controller@1e6c0080: failed to match any schema with compatible: ['aspeed,ast2400-vic'] The YAML DT schema defines an optional property, valid-sources, which was not previously described in the prose binding. It is added to document existing practice in the Aspeed devicetrees. Unfortunately the property seems to predate the requirement that vendor-specific properties be prefixed. Signed-off-by: Andrew Jeffery --- .../interrupt-controller/aspeed,ast2400-vic.txt | 23 -------- .../interrupt-controller/aspeed,ast2400-vic.yaml | 63 ++++++++++++++++++++++ 2 files changed, 63 insertions(+), 23 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt deleted file mode 100644 index e3fea0758d25..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt +++ /dev/null @@ -1,23 +0,0 @@ -Aspeed Vectored Interrupt Controller - -These bindings are for the Aspeed interrupt controller. The AST2400 and -AST2500 SoC families include a legacy register layout before a re-designed -layout, but the bindings do not prescribe the use of one or the other. - -Required properties: - -- compatible : "aspeed,ast2400-vic" - "aspeed,ast2500-vic" - -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 1. - -Example: - - vic: interrupt-controller@1e6c0080 { - compatible = "aspeed,ast2400-vic"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x1e6c0080 0x80>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.yaml new file mode 100644 index 000000000000..1ecbc55571e2 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2400-vic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed Vectored Interrupt Controller + +maintainers: + - Andrew Jeffery + +description: + The AST2400 and AST2500 SoC families include a legacy register layout before + a redesigned layout, but the bindings do not prescribe the use of one or the + other. + +properties: + compatible: + enum: + - aspeed,ast2400-vic + - aspeed,ast2500-vic + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + description: + Specifies the number of cells needed to encode an interrupt source. It + must be 1 as the VIC has no configuration options for interrupt sources. + The single cell defines the interrupt number. + + valid-sources: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + One cell, bitmap of support sources for the implementation. + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupt-controller + - "#interrupt-cells" + +allOf: + - $ref: /schemas/interrupt-controller.yaml + +additionalProperties: false + +examples: + - | + interrupt-controller@1e6c0080 { + compatible = "aspeed,ast2400-vic"; + reg = <0x1e6c0080 0x80>; + interrupt-controller; + #interrupt-cells = <1>; + }; + +...