From patchwork Fri Aug 2 08:56:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 13751270 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D01E2C3DA49 for ; Fri, 2 Aug 2024 08:56:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=ge9lfIEEGFqAgWfByR8zZ5uWAXXsorGpoBF3uw9uY2U=; b=qWAI+g5IJCWKIczJgiSRZC0q6b nScH2YqktFopHYbUxEPP8pH5yn/bvQcr40kxCWxT6uJ1dr69m84n/qCTozyXdllgiiUQ3vjfsr760 vV6HklfXUJnrbP08RYW3uN+icVGd7tDVYt+vF4yhPvyzb2ShRb0k605OHFGwf9Ev9U1wLJsfF5bjF s9rWb+ZW8TTQb1OKMI821NUpIE+D471WaAqW/vqIvolGkqBgZVUYrlHCyuX6IdAubbIWlt5rSSJAs OBYsyXQ4B8WpZuVIO1lvr0tf2vTN4oG2dnZbzVfcT7m/YP6EzXKP1o2hodoAUcDxl7mSJ2WZyp6nH dFR12Uig==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZo5c-00000008Am3-31gk; Fri, 02 Aug 2024 08:56:44 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZo57-00000008Agm-2oSo for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2024 08:56:15 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3AE3D1007; Fri, 2 Aug 2024 01:56:36 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.56.112]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A12C43F766; Fri, 2 Aug 2024 01:56:07 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Marc Zyngier , Thomas Gleixner , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Zenghui Yu Subject: [PATCH V2] irqchip/gic-v4.1: Replace GIC version with ID_AA64PFR0_EL1_GIC_V4P1 Date: Fri, 2 Aug 2024 14:26:01 +0530 Message-Id: <20240802085601.1824057-1-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240802_015613_781541_0E0ABC83 X-CRM114-Status: UNSURE ( 9.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Replace open encoding for GIC version code with ID_AA64PFR0_EL1_GIC_V4P1 in gic_cpuif_has_vsgi(). Cc: Marc Zyngier Cc: Thomas Gleixner Cc: Catalin Marinas Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Zenghui Yu Acked-by: Marc Zyngier Signed-off-by: Anshuman Khandual --- This patch applies on v6.11-rc1. ID_AA64PFR0_EL1.GIC field value for V4P1 has been fixed via a recent commit f3dfcd25455b ("arm64/sysreg: Correct the values for GICv4.1"). Changes in V2: - Updated the subject line per Marc Changes in V1: https://lore.kernel.org/all/20240724054623.667595-1-anshuman.khandual@arm.com/ drivers/irqchip/irq-gic-v4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic-v4.c b/drivers/irqchip/irq-gic-v4.c index ca32ac19d284..58c28895f8c4 100644 --- a/drivers/irqchip/irq-gic-v4.c +++ b/drivers/irqchip/irq-gic-v4.c @@ -97,7 +97,7 @@ bool gic_cpuif_has_vsgi(void) fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64PFR0_EL1_GIC_SHIFT); - return fld >= 0x3; + return fld >= ID_AA64PFR0_EL1_GIC_V4P1; } #else bool gic_cpuif_has_vsgi(void)