From patchwork Thu Aug 8 09:03:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 13757126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 696ECC52D71 for ; Thu, 8 Aug 2024 09:04:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=e/440+A8dXK0xe7E7t1UQYOm04r40gqeXMmIrOnIwgE=; b=m89EqYGDI/OQqfOX6m+oVCwLwG /PAoLQixyTDCh/pDUvtOcaHNiw4B9Gnu75fb3Cn5x+L8Fcmqmzx/hJVdZkuz63qSOK8fGl55Caeje mgfUyhGRu9vLrtxRY8s6r5MWW6tF04Kv9jYB6C2msEKFpU61Ax6Wcq+xB37JIJNlzZl/nMG8L5+Ii HEBHjnW5b342Encs1Xu/EhZqGAIEI5y83Ido3RWa99QWVD5bjCzZHKDJVzam1YZaJWpJ6wRFVsfsL bJfsMMvaWKKoK59u5ZCzaVzzMjheMBz+ovj1wY1UKA+RjTF+dInyFxbPPGfKWrgm29Yejinz/xpGG i3UIG9UA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sbz4J-00000007fEY-3INW; Thu, 08 Aug 2024 09:04:23 +0000 Received: from mx1.tq-group.com ([93.104.207.81]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sbz3j-00000007f69-20QB for linux-arm-kernel@lists.infradead.org; Thu, 08 Aug 2024 09:03:50 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1723107827; x=1754643827; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=e/440+A8dXK0xe7E7t1UQYOm04r40gqeXMmIrOnIwgE=; b=lcIfqmAEzuX8GYBZZF4L/K10gze93i4Y+zWF5iV/gscBHiLQwpwbKOxn h6mtUvIhYvR/Zs1F/baGQEJFEAeJZexV81xdsxKNHIGNQ3u3QIUQsmFQg +oyxY0Dep3obrT/MIIzPK788RyU5w7pt2fWT2lsFi9KgK9hDeUpnPCDfr BEB0xZ8YMf/0Kr4GsGhfikb8JuRuZxgXrxqBaNLoSBmd1QWwEOVCMOX8/ n/v03GcY2rvlebyl7y4x2K32zwgnLvSTuc+ZFf3LXGPnpEWQmHDOgB+kQ 5HwzJh4E+iHc2d3UaH7ePSfS9qhd8mMwN+2BDQfR2YS0GsNWCNusisIyE A==; X-CSE-ConnectionGUID: bgTlkpRNTKqBVidGHiHAMA== X-CSE-MsgGUID: KkxzrK0GSZO28hfEUSbJwA== X-IronPort-AV: E=Sophos;i="6.09,272,1716242400"; d="scan'208";a="38310522" Received: from vmailcow01.tq-net.de ([10.150.86.48]) by mx1.tq-group.com with ESMTP; 08 Aug 2024 11:03:43 +0200 X-CheckPoint: {66B489EF-1-CFE9415D-C7159436} X-MAIL-CPID: CD2309DF6539872ED09BA5D025073AB1_1 X-Control-Analysis: str=0001.0A782F1E.66B489EF.0049,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 8C5F6161356; Thu, 8 Aug 2024 11:03:37 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ew.tq-group.com; s=dkim; t=1723107818; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding; bh=e/440+A8dXK0xe7E7t1UQYOm04r40gqeXMmIrOnIwgE=; b=a7buNEdN+opiCalsy34kFxBfiwjK1gA2b6STxzvvF76LaIslywzc+N7Iun9tTUDkitLAIQ FLa33GmNpJ+Qtj6kDU2rp30qyfUWubP3AxSLpSyruJKPcltQUXXs+cjLFk/jE4ALpBMOJn 6pTWrEMMhVOJTaRmQnPrP1ehK+hzWQtwiPRtXZ1pQo2onN6UVf4oFoq65S2Ih8oQeQGSBN meazJRrIh44MCri4KZk0doMEEwnIx7V6D5GYY5DQDAQ1+WC8IohIO6N36G7yUw/s7PO4qj EcXW3gRaVzdbd0mNqFvTuFvmp0Nx5oVelXhb1Pb98tM8Yn6gINrdUihVj0c69g== From: Alexander Stein To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: Alexander Stein , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/1] arm64: dts: imx8-ss-vpu: Fix imx8qm VPU IRQs Date: Thu, 8 Aug 2024 11:03:26 +0200 Message-Id: <20240808090326.425296-1-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240808_020348_231926_44FF3EB3 X-CRM114-Status: GOOD ( 12.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org imx8-ss-vpu only contained imx8qxp IRQ numbers, only mu2_m0 uses the correct imx8qm IRQ number, as imx8qxp lacks this MU. Fix this by providing imx8qm IRQ numbers in the main imx8-ss-vpu.dtsi and override the IRQ numbers in SoC-specific imx8qxp-ss-vpu.dtsi, similar to reg property for VPU core devices. Signed-off-by: Alexander Stein --- I did not include a Fixes tag as adding support for imx8qxp and imx8qm is split into several commits. It's at lease the combination of the following commits: 0d9968d98467d ("arm64: dts: freescale: imx8q: add imx vpu codec entries") b4efce453f0ca ("arm64: dts: imx8qm: add vpu decoder and encoder") arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi | 4 ++-- arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi | 8 ++++++++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi index c6540768bdb92..87211c18d65a9 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi @@ -15,7 +15,7 @@ vpu: vpu@2c000000 { mu_m0: mailbox@2d000000 { compatible = "fsl,imx6sx-mu"; reg = <0x2d000000 0x20000>; - interrupts = ; + interrupts = ; #mbox-cells = <2>; power-domains = <&pd IMX_SC_R_VPU_MU_0>; status = "disabled"; @@ -24,7 +24,7 @@ mu_m0: mailbox@2d000000 { mu1_m0: mailbox@2d020000 { compatible = "fsl,imx6sx-mu"; reg = <0x2d020000 0x20000>; - interrupts = ; + interrupts = ; #mbox-cells = <2>; power-domains = <&pd IMX_SC_R_VPU_MU_1>; status = "disabled"; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi index 7894a3ab26d6b..f81937b5fb720 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi @@ -5,6 +5,14 @@ * Author: Alexander Stein */ +&mu_m0 { + interrupts = ; +}; + +&mu1_m0 { + interrupts = ; +}; + &vpu_core0 { reg = <0x2d040000 0x10000>; };