From patchwork Mon Aug 12 04:30:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Gan X-Patchwork-Id: 13760131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62139C3DA7F for ; Mon, 12 Aug 2024 04:31:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=IeGrfFSUKNXY/SQdHsLOXN+RZ1hfsllv4M0nMVD7vZM=; b=N/e3hvU81eZ4mNYLC38vYpVxrk 3qhTn4CzWckG55uP0KL9ChEbviK5r/snNokh0cBakfwRl/YT+bcLDZmIfhuFpPkn3YB2KaAiF6GYM MvqE+8qAbDJaXqyyRR7S6B4cRPDimw+icCASdZMdkYV/Cg/VjM/GLImUHGFiJ3IX+uRyWjb711JXU M23bssF6ux+FnKPK+kPYgo+eZvoRmZ/je8UqqAlGWYD9EHZo2pzOUwJYEKsg+REWhmJXci6g5so6Q T5yEJHV+YUlmm0DXDmHo/P3ZBw0x9mHAMRHHvOENeLJrlQhNYVJB+ffyffOxN9qXacVFEWI14h5Wv rAGCW5/g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdMih-0000000Grgy-3Z5P; Mon, 12 Aug 2024 04:31:48 +0000 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdMi6-0000000GrdJ-3rj1 for linux-arm-kernel@lists.infradead.org; Mon, 12 Aug 2024 04:31:12 +0000 Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 47C2ZuqM014292; Mon, 12 Aug 2024 04:31:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=qcppdkim1; bh=IeGrfFSUKNXY/SQdHsLOXN +RZ1hfsllv4M0nMVD7vZM=; b=UxMNyTDlSZ908fHolb2WlitweTUxGYgeiLoMVz prxtXr+S1kBvBuMjUxbgbmRVq7A7+cd4Y6S7U5ZQlipzci8JhyQBARB9oEquc6gO hgT1OFBXtlSEA+ieV2gyYmSP2xgYi1i2IUoEEX8X0qNfBSxEHetydxill0grb2Yr F6eknD9lc9PS8B37REp2XumK6tdxI/fo36Rjw1A/G6mgmUBR9gCI9x+Bf1Uzxgfd 7eDhGXViHxI4MJ6RPUaQlFGtSL60YUlFTVZBHv1EFDRYhAszgK/ci6owzNqYyTnZ +9wBtjbaRbGARLR0aq5eS9H7nN9//6ZbUujxPoaJV8iG/CpA== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 40x18xtu9b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 12 Aug 2024 04:31:05 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 47C4V3YL020811 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 12 Aug 2024 04:31:03 GMT Received: from jiegan-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Sun, 11 Aug 2024 21:31:00 -0700 From: Jie Gan To: Suzuki K Poulose , Alexander Shishkin , Mike Leach CC: Jinlong Mao , , , , Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Song Chai , Subject: [PATCH v2 RESEND] Coresight: Set correct cs_mode for TPDM to fix disable issue Date: Mon, 12 Aug 2024 12:30:43 +0800 Message-ID: <20240812043043.2890694-1-quic_jiegan@quicinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: eBUZWovCI_mdj7PdZ2BQX_x5oBlsHJx9 X-Proofpoint-ORIG-GUID: eBUZWovCI_mdj7PdZ2BQX_x5oBlsHJx9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-11_25,2024-08-07_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 suspectscore=0 phishscore=0 malwarescore=0 mlxscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408120033 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240811_213111_123114_B8BE4560 X-CRM114-Status: GOOD ( 13.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The coresight_disable_source_sysfs function should verify the mode of the coresight device before disabling the source. However, the mode for the TPDM device is always set to CS_MODE_DISABLED, resulting in the check consistently failing. As a result, TPDM cannot be properly disabled. Configure CS_MODE_SYSFS/CS_MODE_PERF during the enablement. Configure CS_MODE_DISABLED during the disablement. Fixes: b3c71626a933 ("Coresight: Add coresight TPDM source driver") Signed-off-by: Jie Gan --- drivers/hwtracing/coresight/coresight-tpdm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c index a9708ab0d488..90a5105f6199 100644 --- a/drivers/hwtracing/coresight/coresight-tpdm.c +++ b/drivers/hwtracing/coresight/coresight-tpdm.c @@ -449,6 +449,11 @@ static int tpdm_enable(struct coresight_device *csdev, struct perf_event *event, return -EBUSY; } + if (!coresight_take_mode(csdev, mode)) { + spin_unlock(&drvdata->spinlock); + return -EBUSY; + } + __tpdm_enable(drvdata); drvdata->enable = true; spin_unlock(&drvdata->spinlock); @@ -506,6 +511,7 @@ static void tpdm_disable(struct coresight_device *csdev, } __tpdm_disable(drvdata); + coresight_set_mode(csdev, CS_MODE_DISABLED); drvdata->enable = false; spin_unlock(&drvdata->spinlock);