From patchwork Mon Aug 12 10:15:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 13760385 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8ABC2C52D7C for ; Mon, 12 Aug 2024 10:18:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Ai7ivLI6aKOU0gC7Thn5U2PfBknNdUO2yModrYZdqO8=; b=cBYedrS/zYUsz3oDRBYAimCOYr kvYZTcE/ZpoR5U9EHUAq3Z57Ba0cVvH25B/t6G1gA3hP/coyTUHS2ZEAh4fh3YeIG1aewEirAXLoW qmtsMurXDdD+Dbni+Do8YMIeysMBZntUyEy767cHasdjceWskbtHu3O9h5WI4N/LB2YYWxSOfxZmX WxxRCdEtuWDW1MqXBwkAXKT/+LUgOnjWZV37zjnXxW1RXMfh0JGPSKdWEZBt4xkWYosnVi0rv0vVw hZBj2w4DTWUwVhO7k7obnZf2LJg5O5eSMUsmmV73JLDSuYORwt10hRwh7VP5dDA9C1fETvIMEeap8 6KPnZXWA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdS86-0000000Ha7I-2QXC; Mon, 12 Aug 2024 10:18:22 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdS5s-0000000HZgH-3L5q for linux-arm-kernel@lists.infradead.org; Mon, 12 Aug 2024 10:16:08 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AD38D11FB; Mon, 12 Aug 2024 03:16:29 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F11043F6A8; Mon, 12 Aug 2024 03:16:02 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: akos.denke@arm.com, andre.przywara@arm.com, luca.fancellu@arm.com, mark.rutland@arm.com, maz@kernel.org Subject: [BOOT-WRAPPER v2 02/10] aarch64: Implement cpu_init_arch() Date: Mon, 12 Aug 2024 11:15:47 +0100 Message-Id: <20240812101555.3558589-3-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240812101555.3558589-1-mark.rutland@arm.com> References: <20240812101555.3558589-1-mark.rutland@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240812_031604_915359_90FB936F X-CRM114-Status: GOOD ( 13.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When the boot-wrapper is entered at EL2 it does not initialise CNTFRQ_EL0, and in future it may need to initialize other CPU state regardless of the exeption level it was entered at. Use a common cpu_init_arch() function to initialize CPU state regardless of the exception level the boot-wrapper was entered at. This change means that the boot-wrapper can only be used when enetered at the highest implemented exception level, as accesses to CNTFRQ_EL0 will be UNDEFINED at lower exception levels. However, the boot-wrapper only supports being booted at the highest implemented exception level, as the comment at the top of boot.S describes: | The boot-wrapper must be entered from the reset vector at the | highest implemented exception level. ... so this should not adversely affect any supported configuration. Signed-off-by: Mark Rutland Acked-by: Marc Zyngier Cc: Akos Denke Cc: Andre Przywara Cc: Luca Fancellu Reviewed-by: Andre Przywara --- arch/aarch64/boot.S | 4 +++- arch/aarch64/init.c | 12 +++++++++--- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S index 73ddcd0..52c617d 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S @@ -51,7 +51,7 @@ reset_at_el3: bl cpu_init_bootwrapper - bl cpu_init_el3 + bl cpu_init_arch bl gic_secure_init @@ -82,6 +82,8 @@ reset_at_el2: bl cpu_init_bootwrapper + bl cpu_init_arch + b start_bootmethod err_invalid_id: diff --git a/arch/aarch64/init.c b/arch/aarch64/init.c index c9fc7f1..49abdf7 100644 --- a/arch/aarch64/init.c +++ b/arch/aarch64/init.c @@ -52,7 +52,7 @@ static inline bool cpu_has_permission_indirection(void) return mrs(ID_AA64MMFR3_EL1) & mask; } -void cpu_init_el3(void) +static void cpu_init_el3(void) { unsigned long scr = SCR_EL3_RES1 | SCR_EL3_NS | SCR_EL3_HCE; unsigned long mdcr = 0; @@ -153,8 +153,6 @@ void cpu_init_el3(void) msr(SMCR_EL3, smcr); } - - msr(CNTFRQ_EL0, COUNTER_FREQ); } #ifdef PSCI @@ -171,3 +169,11 @@ bool cpu_init_psci_arch(void) return true; } #endif + +void cpu_init_arch(void) +{ + if (mrs(CurrentEL) == CURRENTEL_EL3) + cpu_init_el3(); + + msr(CNTFRQ_EL0, COUNTER_FREQ); +}