From patchwork Mon Aug 12 21:51:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13761069 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6614DC3DA7F for ; Mon, 12 Aug 2024 21:54:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ENZn4L1RAB9o73amjJzb3/C6+GzUAncJ/FTZDbsVazI=; b=ag1FwFNeMtn+tUH1xO/DviEvND 8AKzGkc8Qdj3P93xxr4GHlAVYM9rKD7hJpNtPyHe94R6uWtZU2u943H5SHBaWeQFxgjW2nv8mbbaJ OOPt/yGIutD9KEN2PPkjRJ6/pWcsO0yWpW0z5AvJ2WOgJvI4TDy9qWYho/7MLZcsWyXW8qGClMJEb LyhWSl12bZ6xAKKyu0DrkQcS5BEew/RP+Bton+bwFO/759g4sygXiAIkkj+put1awiBw9HtmDvM3g b1/UiMEia2W9OUXVG6UiWpsMcOMivuyjmGVmRAEjXueCYPio/vIkqDRK6JXufc8XeXrVYxWUae2lz 4xlHSeGA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdczH-00000001epX-139s; Mon, 12 Aug 2024 21:53:59 +0000 Received: from out-178.mta0.migadu.com ([91.218.175.178]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdcx3-00000001ePq-33tE for linux-arm-kernel@lists.infradead.org; Mon, 12 Aug 2024 21:51:43 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723499499; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ENZn4L1RAB9o73amjJzb3/C6+GzUAncJ/FTZDbsVazI=; b=p+Ao+wJFCr7d+OlONUc7xkLlPaLuZsiDDqIZRtjRM1USEk+PY417r1JMMUAh4e5Op+vwAy V7aidpB4Y0VqpDeg7N2mqSPfxeqtN1iAzwivgYaVS4EuvG6t2HSvKAaJnEiB6kGBsVbQBL 2YOpNfVu5a6E6wL3i+1RaZCYGFz8odQ= From: Sean Anderson To: Michal Simek , linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Conor Dooley , Krzysztof Kozlowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Sean Anderson Subject: [PATCH 3/3] arm64: zynqmp: Add thermal zones Date: Mon, 12 Aug 2024 17:51:28 -0400 Message-Id: <20240812215129.3599832-4-sean.anderson@linux.dev> In-Reply-To: <20240812215129.3599832-1-sean.anderson@linux.dev> References: <20240812215129.3599832-1-sean.anderson@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240812_145141_936928_115DA086 X-CRM114-Status: GOOD ( 16.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add some thermal trip points. We can't undervolt the CPUs to save power when we underclock them, so there isn't really a point in throttling them until we are about to overheat. As such, the passive trip point is right below the critical trip point. The critical trip point is the extended/industrial-grade maximum junction temperature of 100C minus the maximum temperature sensor error of 3.5C (in the range -55C to 110C). Automotive- and military-grade parts can go up to 125C, but as far as I can tell there is no way to detect them at runtime. Userspace can adjust the trip points at runtime, but this may not be viable when booting above 100C. I think it's reasonable to ask automotive/military users to edit their device trees to bump the trip points, but if that proves to be an issue we can always go with no default temperatures. However, that wouldn't be too nice for the majority of extended/industrial users. Signed-off-by: Sean Anderson --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 86 ++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 21c1adbaf35f..467f084c6469 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -18,6 +18,7 @@ #include #include #include +#include / { compatible = "xlnx,zynqmp"; @@ -36,6 +37,7 @@ cpus { #size-cells = <0>; cpu0: cpu@0 { + #cooling-cells = <2>; compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; @@ -46,6 +48,7 @@ cpu0: cpu@0 { }; cpu1: cpu@1 { + #cooling-cells = <2>; compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; @@ -56,6 +59,7 @@ cpu1: cpu@1 { }; cpu2: cpu@2 { + #cooling-cells = <2>; compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; @@ -66,6 +70,7 @@ cpu2: cpu@2 { }; cpu3: cpu@3 { + #cooling-cells = <2>; compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; @@ -406,6 +411,87 @@ ams { <&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>; }; + + tsens_apu: thermal-sensor-apu { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&xilinx_ams 7>; + io-channel-names = "sensor-channel"; + }; + + tsens_rpu: thermal-sensor-rpu { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&xilinx_ams 8>; + io-channel-names = "sensor-channel"; + }; + + tsens_pl: thermal-sensor-pl { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&xilinx_ams 20>; + io-channel-names = "sensor-channel"; + }; + + thermal-zones { + apu-thermal { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tsens_apu>; + + trips { + apu_passive: passive { + temperature = <93000>; + hysteresis = <3500>; + type = "passive"; + }; + + apu_critical: critical { + temperature = <96500>; + hysteresis = <3500>; + type = "critical"; + }; + }; + + cooling-maps { + map { + trip = <&apu_passive>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + rpu-thermal { + polling-delay = <10000>; + thermal-sensors = <&tsens_rpu>; + + trips { + critical { + temperature = <96500>; + hysteresis = <3500>; + type = "critical"; + }; + }; + }; + + pl-thermal { + polling-delay = <10000>; + thermal-sensors = <&tsens_pl>; + + trips { + critical { + temperature = <96500>; + hysteresis = <3500>; + type = "critical"; + }; + }; + }; + }; + amba: axi { compatible = "simple-bus"; bootph-all;