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AJvYcCWcmxzFay3nhAb/paertUV4ysTdogsA85hXSu6lFQI4V+riY05eMFXlGpubFw14eIGXUa8lxfQNS0DkQo9pdF57EJ9osaerGSHa+Zamzj7LWsQYZbY= X-Gm-Message-State: AOJu0YwQ6cehfvianHvzJJxTniBsi1wM+Bz5OydlUEw7mNu0uk4aJ3gl w36hwFlko95rIuY23NTsYqRIqGud9p0XVmxq5rO/xS2lcCjLzQ6h X-Google-Smtp-Source: AGHT+IHE05TuCyt00A6s9cE1mKfpK9EVIx9TkS3oCHaFi1BhoF8/ztPZ5xgaGZQyiwuRYNARtev9jw== X-Received: by 2002:a05:6000:1a89:b0:371:8d08:6309 with SMTP id ffacd0b85a97d-371a7477af5mr5590541f8f.55.1724058273566; Mon, 19 Aug 2024 02:04:33 -0700 (PDT) Received: from eichest-laptop.toradex.int ([2a02:168:af72:0:a64c:8731:e4fb:38f1]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-429ded19627sm154672095e9.5.2024.08.19.02.04.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Aug 2024 02:04:33 -0700 (PDT) From: Stefan Eichenberger To: hongxing.zhu@nxp.com, l.stach@pengutronix.de, lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, bhelgaas@google.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, francesco.dolcini@toradex.com Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, Stefan Eichenberger Subject: [PATCH v1 1/3] PCI: imx6: Add a function to deassert the reset gpio Date: Mon, 19 Aug 2024 11:03:17 +0200 Message-ID: <20240819090428.17349-2-eichest@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240819090428.17349-1-eichest@gmail.com> References: <20240819090428.17349-1-eichest@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240819_020435_477841_D8864C0E X-CRM114-Status: GOOD ( 13.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Stefan Eichenberger To avoid code duplication, move the code to disable the reset GPIO to a separate function. Signed-off-by: Stefan Eichenberger --- drivers/pci/controller/dwc/pci-imx6.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 964d67756eb2b..fda704d82431f 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -722,6 +722,17 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) gpiod_set_value_cansleep(imx6_pcie->reset_gpiod, 1); } +static void imx6_pcie_deassert_reset_gpio(struct imx6_pcie *imx6_pcie) +{ + /* Some boards don't have PCIe reset GPIO. */ + if (imx6_pcie->reset_gpiod) { + msleep(100); + gpiod_set_value_cansleep(imx6_pcie->reset_gpiod, 0); + /* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */ + msleep(100); + } +} + static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; @@ -766,13 +777,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) break; } - /* Some boards don't have PCIe reset GPIO. */ - if (imx6_pcie->reset_gpiod) { - msleep(100); - gpiod_set_value_cansleep(imx6_pcie->reset_gpiod, 0); - /* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */ - msleep(100); - } + imx6_pcie_deassert_reset_gpio(imx6_pcie); return 0; }