From patchwork Thu Aug 22 10:14:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 13773191 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EF1CBC5320E for ; Thu, 22 Aug 2024 10:24:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2etk2514+/wLVw/rhkQl69zp97omESjtvg5qtdW2/JA=; b=p8WBJkvfQ1UoS4JKh7TNoZ5zcI BmvdBFUXU86uj8w5c/+3KXT8AS32qmBbYlkf47glFcDp8hTfJ41IwfO8KY3ooEXN5+5qoT2Rh6Ffo 9JOWXUs8BH7eJpnya+KtmdBO44M81pxWmQIwWiCCl/8N6h5AxbsKFyA143+EsPHpEB/qn83lybkys bsr0nPsc+AJ+gfBL1lYBJ0lyMxacc56tV/OwWe7VHRWOmxDhXGJGaB3IWiC2gzvtc9AxvZeelJOsX Es0Z4PKqhsRGuScwAckiLLd5sVzv8r36PVE7AspIr2WIT9yGwPrRp/yrZqXpIVQ3jXjrTUEQdwCh1 qNjGko3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sh4zj-0000000CQC0-0k0U; Thu, 22 Aug 2024 10:24:43 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sh4r7-0000000COHo-0ImZ for linux-arm-kernel@lists.infradead.org; Thu, 22 Aug 2024 10:15:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8DFE2FEC; Thu, 22 Aug 2024 03:15:34 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 285793F66E; Thu, 22 Aug 2024 03:15:07 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: akos.denke@arm.com, andre.przywara@arm.com, luca.fancellu@arm.com, mark.rutland@arm.com, maz@kernel.org Subject: [BOOT-WRAPPER v3 04/10] aarch32: Refactor inital entry Date: Thu, 22 Aug 2024 11:14:35 +0100 Message-Id: <20240822101441.251184-5-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240822101441.251184-1-mark.rutland@arm.com> References: <20240822101441.251184-1-mark.rutland@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240822_031549_222328_DB843941 X-CRM114-Status: GOOD ( 11.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org For historical reasons the early AArch32 code is structured differently from the early AArch64 code, with some common code (including stack setup) performed before we identify the mode we were entered in. Align the structure of the early AArch32 code with that of the early AArch64 code. This will make subsequent refactoring easier. Signed-off-by: Mark Rutland Acked-by: Marc Zyngier Reviewed-by: Andre Przywara Cc: Akos Denke Cc: Luca Fancellu --- arch/aarch32/boot.S | 55 ++++++++++++++++++++++++++++----------------- 1 file changed, 34 insertions(+), 21 deletions(-) diff --git a/arch/aarch32/boot.S b/arch/aarch32/boot.S index 4d16c9c..cf83e55 100644 --- a/arch/aarch32/boot.S +++ b/arch/aarch32/boot.S @@ -31,7 +31,28 @@ * PSCI is not supported when entered in this mode. */ ASM_FUNC(_start) - /* Stack initialisation */ + mrs r0, cpsr + and r0, #PSR_MODE_MASK + cmp r0, #PSR_SVC + beq reset_at_svc + cmp r0, #PSR_HYP + beq reset_at_hyp + + /* Booting at other modes is not supported */ + b . + +reset_at_svc: + /* + * When entered in Secure SVC mode we must switch to monitor mode to + * configure SCR.NS. Switch to monitor mode ASAP to simplify later + * code. + */ + adr lr, reset_at_mon + ldr r0, =(PSR_A | PSR_I | PSR_F | PSR_MON) + msr spsr, r0 + movs pc, lr + +reset_at_mon: cpuid r0, r1 bl find_logical_id cmp r0, #MPIDR_INVALID @@ -39,36 +60,28 @@ ASM_FUNC(_start) bl setup_stack - mrs r0, cpsr - and r0, #PSR_MODE_MASK - - cmp r0, #PSR_HYP - bne _switch_monitor + bl cpu_init_bootwrapper - mov r0, #1 - ldr r1, =flag_no_el3 - str r0, [r1] + bl cpu_init_secure_pl1 - bl cpu_init_bootwrapper + bl gic_secure_init b start_bootmethod -_switch_monitor: - adr lr, _monitor - ldr r0, =(PSR_A | PSR_I | PSR_F | PSR_MON) - msr spsr, r0 - movs pc, lr +reset_at_hyp: + cpuid r0, r1 + bl find_logical_id + cmp r0, #MPIDR_INVALID + beq err_invalid_id -_monitor: - /* Move the stack to Monitor mode*/ - mrs sp, sp_svc + bl setup_stack - bl cpu_init_secure_pl1 + mov r0, #1 + ldr r1, =flag_no_el3 + str r0, [r1] bl cpu_init_bootwrapper - bl gic_secure_init - b start_bootmethod err_invalid_id: