diff mbox series

[v1,09/10] arm64: dts: colibri-imx8x: Add 50mhz clock for eth

Message ID 20240826215922.13225-10-francesco@dolcini.it (mailing list archive)
State New, archived
Headers show
Series arm64: dts: colibri-imx8x: Various improvements and additions | expand

Commit Message

Francesco Dolcini Aug. 26, 2024, 9:59 p.m. UTC 
From: Philippe Schenker <philippe.schenker@toradex.com>

Change enet0_lpcg to get the clock value needed in Colibri-iMX8X for
100mbps ethernet.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---
 arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index 9cd4383e9298..75259e8d48a9 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -106,6 +106,21 @@  &cpu_crit0 {
 	type = "critical";
 };
 
+&enet0_lpcg {
+	clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>,
+		 <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>,
+		 <&conn_axi_clk>,
+		 <&clk IMX_SC_R_ENET_0 IMX_SC_C_DISABLE_50>,
+		 <&conn_ipg_clk>,
+		 <&conn_ipg_clk>;
+	clock-output-names = "enet0_lpcg_timer_clk",
+			     "enet0_lpcg_txc_sampling_clk",
+			     "enet0_lpcg_ahb_clk",
+			     "enet0_lpcg_ref_50mhz_clk",
+			     "enet0_lpcg_ipg_clk",
+			     "enet0_lpcg_ipg_s_clk";
+};
+
 /* TODO flexcan1 - 3 */
 
 /* TODO GPU */