From patchwork Sat Aug 31 07:18:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13785966 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61B62CA100B for ; Sat, 31 Aug 2024 07:23:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=H1vN6DbwjtnQxPW/Y38kvDA8/qLNBFSlcVLAgT6nqKE=; b=mASA0+eT8HTL9lksd74tXOX1p3 Lyx86KwaR1XQ1JiO+zmix3fwkpLyiHIr9JPHJKA5nQDiBJKay7sCpd2c4qecht2a967ehOWJGlQmH yL1uuVNJZKskGeJOc7+/pmjnigsyYTdTclc7keRs/SMnLWJNh/O185mhHBQKPPGLhXTFAzl56hpqt BDVAyHoA8DocxRMgocnljOK47MVZupBWkUfmAGaJSYBmzr8F5ltx+YteTpjIYc9fZZowQyS0drvNX WnhvzpjSOiQHtZ2OChbvXeWkyE5rQNyLHBgVEx9Hpdo3JU/asFqO66qRTBAv43D/WHhbNBJHI3LT0 qbc7V8WQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1skISK-00000008p5q-3t2j; Sat, 31 Aug 2024 07:23:32 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1skIOG-00000008oeh-094Z for linux-arm-kernel@lists.infradead.org; Sat, 31 Aug 2024 07:19:21 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 56AABA40109; Sat, 31 Aug 2024 07:19:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 801AAC4CEC0; Sat, 31 Aug 2024 07:19:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1725088759; bh=YHZJ988FcV1F6uBvvv9QjPxEj5imGTvAZwqhOOIKZMw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=oq3xgBpJHlfBfoOOTOeVBPqjHOlKNrS7FVMEgo3Vz1dXy47NgTCxqpkGs1G5Lw4wN uaWTYp6t6ONiteLlQXhVbDH4FdDQ0hh3qv0TPgYXCxbJPIozBPWvJ7bJZ68FjCs07J d6LCaNYx52miNtfp3K0t3WBOD6f6pv6B040/0HE0KqDc3PqblXfdHz6LUp+Mq7Bq53 wx7ca/UWvA6TGLatelI9HsuiSMTvrB0UNW2U19P588SQ2Q0TgPT5tkDqvYSE0bgmUT mq6AFct3R09R/ycDb3F3tL1Lu0/BS8nz56H6iogzgR52J4mXb7k2FGbwCaCS8glwCR KpZihWPlEqZbQ== From: Lorenzo Bianconi Date: Sat, 31 Aug 2024 09:18:46 +0200 Subject: [PATCH 4/7] clk: en7523: introduce chip_scu regmap MIME-Version: 1.0 Message-Id: <20240831-clk-en7581-syscon-v1-4-5c2683541068@kernel.org> References: <20240831-clk-en7581-syscon-v1-0-5c2683541068@kernel.org> In-Reply-To: <20240831-clk-en7581-syscon-v1-0-5c2683541068@kernel.org> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Felix Fietkau , Philipp Zabel Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, upstream@airoha.com, angelogioacchino.delregno@collabora.com, linux-arm-kernel@lists.infradead.org, lorenzo.bianconi83@gmail.com, ansuelsmth@gmail.com, Lorenzo Bianconi X-Mailer: b4 0.14.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240831_001920_240514_7925A894 X-CRM114-Status: GOOD ( 14.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Introduce chip_scu regmap pointer since EN7581 SoC will access chip-scu memory area through a syscon node. Remove first memory region mapping for EN7581 SoC. This patch does not introduce any backward incompatibility since the dts for EN7581 SoC is not public yet. Signed-off-by: Lorenzo Bianconi --- drivers/clk/clk-en7523.c | 75 +++++++++++++++++++++++++++++++++++------------- 1 file changed, 55 insertions(+), 20 deletions(-) diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c index 78bcb0ce77a5..d0f936ec6bb2 100644 --- a/drivers/clk/clk-en7523.c +++ b/drivers/clk/clk-en7523.c @@ -255,15 +255,11 @@ static const u16 en7581_rst_map[] = { [EN7581_XPON_MAC_RST] = RST_NR_PER_BANK + 31, }; -static unsigned int en7523_get_base_rate(void __iomem *base, unsigned int i) +static u32 en7523_get_base_rate(const struct en_clk_desc *desc, u32 val) { - const struct en_clk_desc *desc = &en7523_base_clks[i]; - u32 val; - if (!desc->base_bits) return desc->base_value; - val = readl(base + desc->base_reg); val >>= desc->base_shift; val &= (1 << desc->base_bits) - 1; @@ -273,16 +269,11 @@ static unsigned int en7523_get_base_rate(void __iomem *base, unsigned int i) return desc->base_values[val]; } -static u32 en7523_get_div(void __iomem *base, int i) +static u32 en7523_get_div(const struct en_clk_desc *desc, u32 val) { - const struct en_clk_desc *desc = &en7523_base_clks[i]; - u32 reg, val; - if (!desc->div_bits) return 1; - reg = desc->div_reg ? desc->div_reg : desc->base_reg; - val = readl(base + reg); val >>= desc->div_shift; val &= (1 << desc->div_bits) - 1; @@ -424,9 +415,12 @@ static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_dat for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) { const struct en_clk_desc *desc = &en7523_base_clks[i]; + u32 reg = desc->div_reg ? desc->div_reg : desc->base_reg; + u32 val = readl(base + desc->base_reg); - rate = en7523_get_base_rate(base, i); - rate /= en7523_get_div(base, i); + rate = en7523_get_base_rate(desc, val); + val = readl(base + reg); + rate /= en7523_get_div(desc, val); hw = clk_hw_register_fixed_rate(dev, desc->name, NULL, 0, rate); if (IS_ERR(hw)) { @@ -462,22 +456,63 @@ static int en7523_clk_hw_init(struct platform_device *pdev, return 0; } +static void en7581_register_clocks(struct device *dev, struct clk_hw_onecell_data *clk_data, + struct regmap *map, void __iomem *base) +{ + struct clk_hw *hw; + u32 rate; + int i; + + for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) { + const struct en_clk_desc *desc = &en7523_base_clks[i]; + u32 val, reg = desc->div_reg ? desc->div_reg : desc->base_reg; + + if (regmap_read(map, desc->base_reg, &val)) { + pr_err("Failed reading fixed clk rate %s: %ld\n", + desc->name, PTR_ERR(hw)); + continue; + } + rate = en7523_get_base_rate(desc, val); + + if (regmap_read(map, reg, &val)) { + pr_err("Failed reading fixed clk div %s: %ld\n", + desc->name, PTR_ERR(hw)); + continue; + } + rate /= en7523_get_div(desc, val); + + hw = clk_hw_register_fixed_rate(dev, desc->name, NULL, 0, rate); + if (IS_ERR(hw)) { + pr_err("Failed to register clk %s: %ld\n", + desc->name, PTR_ERR(hw)); + continue; + } + + clk_data->hws[desc->id] = hw; + } + + hw = en7523_register_pcie_clk(dev, base); + clk_data->hws[EN7523_CLK_PCIE] = hw; + + clk_data->num = EN7523_NUM_CLOCKS; +} + static int en7581_clk_hw_init(struct platform_device *pdev, struct clk_hw_onecell_data *clk_data) { - void __iomem *base, *np_base; + void __iomem *np_base; struct regmap *map; u32 val; - base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); + map = syscon_regmap_lookup_by_compatible("airoha,en7581-chip-scu"); + if (IS_ERR(map)) + return PTR_ERR(map); - np_base = devm_platform_ioremap_resource(pdev, 1); + np_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(np_base)) return PTR_ERR(np_base); - en7523_register_clocks(&pdev->dev, clk_data, base, np_base); + en7581_register_clocks(&pdev->dev, clk_data, map, np_base); val = readl(np_base + REG_NP_SCU_SSTR); val &= ~(REG_PCIE_XSI0_SEL_MASK | REG_PCIE_XSI1_SEL_MASK); @@ -565,7 +600,7 @@ static int en7523_reset_register(struct platform_device *pdev, if (!soc_data->reset.idx_map_nr) return 0; - base = devm_platform_ioremap_resource(pdev, 2); + base = devm_platform_ioremap_resource(pdev, 1); if (IS_ERR(base)) return PTR_ERR(base);