| Message ID | 20240918182117.86221-3-laurentiumihalcea111@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | configure imx8 dsp DT node for rproc usage | expand |
On Wed, Sep 18, 2024 at 02:21:14PM -0400, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > Currently, the dsp node is configured for SOF usage, which > is not the "default" case and should be done in a separate > SOF DTS. As such, configure the dsp node for rproc usage, > which is the "default" case. why do you think SOF is not "default" case? where sof dts? Frank > > This also includes the addition of the 2 optional > power domains which may be required by some applications. > > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > --- > .../boot/dts/freescale/imx8-ss-audio.dtsi | 20 +++++++++---------- > arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 15 +++++++++++++- > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 19 ++++++++++++++++++ > 3 files changed, 42 insertions(+), 12 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi > index ff5df0fed9e9..28970211dd67 100644 > --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi > @@ -431,22 +431,20 @@ dsp_ram_lpcg: clock-controller@59590000 { > }; > > dsp: dsp@596e8000 { > - compatible = "fsl,imx8qxp-dsp"; > + compatible = "fsl,imx8qxp-hifi4"; > reg = <0x596e8000 0x88000>; > clocks = <&dsp_lpcg IMX_LPCG_CLK_5>, > <&dsp_ram_lpcg IMX_LPCG_CLK_4>, > <&dsp_lpcg IMX_LPCG_CLK_7>; > clock-names = "ipg", "ocram", "core"; > - power-domains = <&pd IMX_SC_R_MU_13A>, > - <&pd IMX_SC_R_MU_13B>, > - <&pd IMX_SC_R_DSP>, > - <&pd IMX_SC_R_DSP_RAM>; > - mbox-names = "txdb0", "txdb1", > - "rxdb0", "rxdb1"; > - mboxes = <&lsio_mu13 2 0>, > - <&lsio_mu13 2 1>, > - <&lsio_mu13 3 0>, > - <&lsio_mu13 3 1>; > + power-domains = <&pd IMX_SC_R_MU_13B>, > + <&pd IMX_SC_R_IRQSTR_DSP>, > + <&pd IMX_SC_R_MU_2A>; > + mbox-names = "tx", "rx", "rxdb"; > + mboxes = <&lsio_mu13 0 0>, > + <&lsio_mu13 1 0>, > + <&lsio_mu13 3 0>; > + firmware-name = "imx/dsp/hifi4.bin"; > status = "disabled"; > }; > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts > index 936ba5ecdcac..527933a3eb5c 100644 > --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts > +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts > @@ -63,7 +63,8 @@ sound-wm8960 { > }; > > &dsp { > - memory-region = <&dsp_reserved>; > + memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, > + <&dsp_vdev0vring1>, <&dsp_reserved>; > status = "okay"; > }; > > @@ -71,6 +72,18 @@ &dsp_reserved { > status = "okay"; > }; > > +&dsp_vdev0buffer { > + status = "okay"; > +}; > + > +&dsp_vdev0vring0 { > + status = "okay"; > +}; > + > +&dsp_vdev0vring1 { > + status = "okay"; > +}; > + > &fec1 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_fec1>; > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > index 0313f295de2e..9522a65b3e22 100644 > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > @@ -186,6 +186,25 @@ dsp_reserved: dsp@92400000 { > status = "disabled"; > }; > > + dsp_vdev0vring0: vdev0vring0@942f0000 { > + reg = <0 0x942f0000 0 0x8000>; > + no-map; > + status = "disabled"; > + }; > + > + dsp_vdev0vring1: vdev0vring1@942f8000 { > + reg = <0 0x942f8000 0 0x8000>; > + no-map; > + status = "disabled"; > + }; > + > + dsp_vdev0buffer: vdev0buffer@94300000 { > + compatible = "shared-dma-pool"; > + reg = <0 0x94300000 0 0x100000>; > + no-map; > + status = "disabled"; > + }; > + > encoder_rpc: encoder-rpc@94400000 { > reg = <0 0x94400000 0 0x700000>; > no-map; > -- > 2.34.1 >
On Wed, Sep 18, 2024 at 10:02 PM Frank Li <Frank.li@nxp.com> wrote: > > On Wed, Sep 18, 2024 at 02:21:14PM -0400, Laurentiu Mihalcea wrote: > > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > > > Currently, the dsp node is configured for SOF usage, which > > is not the "default" case and should be done in a separate > > SOF DTS. As such, configure the dsp node for rproc usage, > > which is the "default" case. > > why do you think SOF is not "default" case? where sof dts? SOF DTS are yet to be upstreamed. We use the DSP for several usescases. 1) General applications using the DSP using remoteproc/rpmsg interface. 2) Sound Open Firmware. We would like to have 1) as a default this implies that Audio is done via default ALSA path.
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi index ff5df0fed9e9..28970211dd67 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi @@ -431,22 +431,20 @@ dsp_ram_lpcg: clock-controller@59590000 { }; dsp: dsp@596e8000 { - compatible = "fsl,imx8qxp-dsp"; + compatible = "fsl,imx8qxp-hifi4"; reg = <0x596e8000 0x88000>; clocks = <&dsp_lpcg IMX_LPCG_CLK_5>, <&dsp_ram_lpcg IMX_LPCG_CLK_4>, <&dsp_lpcg IMX_LPCG_CLK_7>; clock-names = "ipg", "ocram", "core"; - power-domains = <&pd IMX_SC_R_MU_13A>, - <&pd IMX_SC_R_MU_13B>, - <&pd IMX_SC_R_DSP>, - <&pd IMX_SC_R_DSP_RAM>; - mbox-names = "txdb0", "txdb1", - "rxdb0", "rxdb1"; - mboxes = <&lsio_mu13 2 0>, - <&lsio_mu13 2 1>, - <&lsio_mu13 3 0>, - <&lsio_mu13 3 1>; + power-domains = <&pd IMX_SC_R_MU_13B>, + <&pd IMX_SC_R_IRQSTR_DSP>, + <&pd IMX_SC_R_MU_2A>; + mbox-names = "tx", "rx", "rxdb"; + mboxes = <&lsio_mu13 0 0>, + <&lsio_mu13 1 0>, + <&lsio_mu13 3 0>; + firmware-name = "imx/dsp/hifi4.bin"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index 936ba5ecdcac..527933a3eb5c 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -63,7 +63,8 @@ sound-wm8960 { }; &dsp { - memory-region = <&dsp_reserved>; + memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, + <&dsp_vdev0vring1>, <&dsp_reserved>; status = "okay"; }; @@ -71,6 +72,18 @@ &dsp_reserved { status = "okay"; }; +&dsp_vdev0buffer { + status = "okay"; +}; + +&dsp_vdev0vring0 { + status = "okay"; +}; + +&dsp_vdev0vring1 { + status = "okay"; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index 0313f295de2e..9522a65b3e22 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -186,6 +186,25 @@ dsp_reserved: dsp@92400000 { status = "disabled"; }; + dsp_vdev0vring0: vdev0vring0@942f0000 { + reg = <0 0x942f0000 0 0x8000>; + no-map; + status = "disabled"; + }; + + dsp_vdev0vring1: vdev0vring1@942f8000 { + reg = <0 0x942f8000 0 0x8000>; + no-map; + status = "disabled"; + }; + + dsp_vdev0buffer: vdev0buffer@94300000 { + compatible = "shared-dma-pool"; + reg = <0 0x94300000 0 0x100000>; + no-map; + status = "disabled"; + }; + encoder_rpc: encoder-rpc@94400000 { reg = <0 0x94400000 0 0x700000>; no-map;