From patchwork Thu Oct 3 22:52:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Easwar Hariharan X-Patchwork-Id: 13821649 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3ED1CF34CF for ; Thu, 3 Oct 2024 22:54:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=FSVoCHOR4Nur1zXWJsVTiFk1urE5TyF4R59CiPEAWLU=; b=vBuZozvIA9k/L72m+l7Vd+skly MjRpYdQxbQ4LB+YsRfsTsXW+zkUe8JeAivvN2+8JuGge5f3NqRsut2PChRlQa2j+4D4MTSihlc+yn 5bWB+LaxR+IPTgdAf2//XPmf6Q/ISeGy7do4zvw30OioWgjI+VEakZUeKLplWZftDqZne6e0+mUlk pnFrzRP2szEvQpEx7QMsGZR+wNHe0b4SicLnt/cuAERJuSkubGROTFAwM0CcuKn1j7moMy0BN8YIJ oRC7S+Z1P8iVmgwO6KjJqiWDeDArIB7/DG60djtbH0m1OpJxP6bhjWm0DiqFiTJmTN9SHVEK3IZBZ ssVnTNDw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1swUhy-0000000AZWK-3HpZ; Thu, 03 Oct 2024 22:54:06 +0000 Received: from linux.microsoft.com ([13.77.154.182]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1swUgj-0000000AZL2-1Qqb for linux-arm-kernel@lists.infradead.org; Thu, 03 Oct 2024 22:52:50 +0000 Received: from rrs24-12-35.corp.microsoft.com (unknown [131.107.174.176]) by linux.microsoft.com (Postfix) with ESMTPSA id E756A20DB360; Thu, 3 Oct 2024 15:52:44 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com E756A20DB360 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1727995965; bh=FSVoCHOR4Nur1zXWJsVTiFk1urE5TyF4R59CiPEAWLU=; h=From:To:Cc:Subject:Date:From; b=bvkeWOlxZxpdvVT+HuCq7T+tEoF6PaAzwch+Si3EXSCqltSLIXDj5WvJshCY5eai2 /fcxdtqPZEBw3Q87pMVcyLZL+AgojKX2UHw71fOAjL7LnTNjMH3On7yX045kC4fgP/ Jku7y/LNrFPY20WVMtaokBOUTC6KbuzjH6vLt2TQ= From: Easwar Hariharan To: Catalin Marinas , Will Deacon , Jonathan Corbet , Mark Rutland , Oliver Upton , Easwar Hariharan , Rob Herring , D Scott Phillips , linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list) Cc: James More , stable@vger.kernel.org Subject: [PATCH] arm64: Subscribe Microsoft Azure Cobalt 100 to erratum 3194386 Date: Thu, 3 Oct 2024 22:52:35 +0000 Message-ID: <20241003225239.321774-1-eahariha@linux.microsoft.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241003_155249_430434_2B15C09C X-CRM114-Status: UNSURE ( 8.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the Microsoft Azure Cobalt 100 CPU to the list of CPUs suffering from erratum 3194386 added in commit 75b3c43eab59 ("arm64: errata: Expand speculative SSBS workaround") CC: Mark Rutland CC: James More CC: Will Deacon CC: stable@vger.kernel.org # 6.6+ Signed-off-by: Easwar Hariharan --- Documentation/arch/arm64/silicon-errata.rst | 2 ++ arch/arm64/kernel/cpu_errata.c | 1 + 2 files changed, 3 insertions(+) diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst index 9eb5e70b4888..a7d03f1de72d 100644 --- a/Documentation/arch/arm64/silicon-errata.rst +++ b/Documentation/arch/arm64/silicon-errata.rst @@ -289,3 +289,5 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | Microsoft | Azure Cobalt 100| #2253138 | ARM64_ERRATUM_2253138 | +----------------+-----------------+-----------------+-----------------------------+ +| Microsoft | Azure Cobalt 100| #3324339 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index dfefbdf4073a..1a6fd56a13c1 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -449,6 +449,7 @@ static const struct midr_range erratum_spec_ssbs_list[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_X925), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), + MIDR_ALL_VERSIONS(MIDR_MICROSOFT_AZURE_COBALT_100), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),