From patchwork Fri Oct 4 13:19:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Machon X-Patchwork-Id: 13822374 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2A52CFA77B for ; Fri, 4 Oct 2024 13:34:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=8eKF822ej7bamr5qpUSDL0mjG3BKyJiXCFcoHS/5g6Y=; b=QxKg8Kz3vcC1THQm1v+1TUMkSM QS/TF+5qOSqFB5qZ9/2QuZVkOWKLiT+xC/Lm2BLsKprClolwOccJNTmJfXwvpLDvhPYDADoqFb+cK VbsnOXMsCSrgD3I5ENVSRIhwXZsdnyzkgouvVdCqpgQNLdS9B91n8T/xraNsgAEgUyKF28EUP5GJb ZSkQDj9uUxr22C2WS+Z4w9EFLhEogGjBXhcL/G1cSblv8a4jCsa4vu4/NxC5BCL/pXJdomAEXR+Op xPemQnWNmUWXg6zVxmhn6vJFLQBonp7ARWZ4WslwKyeeRk9itdY4+V0+fPOJLxxXzhVjXVFTGraxD Ha4rKXdw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1swiS0-0000000CYc9-3Izf; Fri, 04 Oct 2024 13:34:32 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1swiEl-0000000CUKF-1kZl for linux-arm-kernel@lists.infradead.org; Fri, 04 Oct 2024 13:20:52 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1728048051; x=1759584051; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=GtT8dIXkCRQoalYMW20XchQAzYWReesIgKy2fhfGmEQ=; b=gcT6fnkA2hJ6DUQQvil4YI7/Kr9bvwXRJ3FsPdrWq3gBbO5DP8OBo4Ab zSxkCdSZHzwNQuumszSGcY+E2HQZS+J2b8y/twi43t8Eo0ac7r8HaKl3H fMaDIll/ZXejuwGaXg5zdopHvA/L0qsgR2f1+tJiPMeCTa1DG1hPB+U7k v+uDhDpve8cDsEilP0mcT9nziGAsmzcsbCoguzc2ZjZFlo9Xck4nmYqbb ojPWDJvxnbH/UB+xqn8mLEUJBojdbeZhpTMIIT9BA5ENZzXZRPbSYxpiV OWFVR5D4YqtZfJ6By5Ek5rRln7uhUC62MFgZiqXAVDHEM4jwUxIwRt9KD w==; X-CSE-ConnectionGUID: ijig+GXpR1+FjNkYwRnQGA== X-CSE-MsgGUID: 4W4zuG/XS2W8bpR3zChhew== X-IronPort-AV: E=Sophos;i="6.11,177,1725346800"; d="scan'208";a="32602257" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Oct 2024 06:20:51 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 4 Oct 2024 06:20:40 -0700 Received: from DEN-DL-M70577.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 4 Oct 2024 06:20:37 -0700 From: Daniel Machon Date: Fri, 4 Oct 2024 15:19:37 +0200 Subject: [PATCH net-next v2 11/15] net: sparx5: ops out function for setting the port mux MIME-Version: 1.0 Message-ID: <20241004-b4-sparx5-lan969x-switch-driver-v2-11-d3290f581663@microchip.com> References: <20241004-b4-sparx5-lan969x-switch-driver-v2-0-d3290f581663@microchip.com> In-Reply-To: <20241004-b4-sparx5-lan969x-switch-driver-v2-0-d3290f581663@microchip.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lars Povlsen , "Steen Hegelund" , , , , Richard Cochran , , , , , , CC: , , X-Mailer: b4 0.14-dev X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241004_062051_499677_12D07BC8 X-CRM114-Status: GOOD ( 13.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Port muxing is configured based on the supported port modes. As these modes can differ on Sparx5 and lan969x we ops out the port muxing function. Reviewed-by: Steen Hegelund Reviewed-by: Jacob Keller Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/sparx5_main.c | 1 + drivers/net/ethernet/microchip/sparx5/sparx5_main.h | 6 ++++++ drivers/net/ethernet/microchip/sparx5/sparx5_port.c | 7 +++---- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c index fb677a4a58ee..33d89461f0f4 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -992,6 +992,7 @@ static const struct sparx5_ops sparx5_ops = { .get_port_dev_bit = &sparx5_port_dev_mapping, .get_hsch_max_group_rate = &sparx5_get_hsch_max_group_rate, .get_sdlb_group = &sparx5_get_sdlb_group, + .set_port_mux = &sparx5_port_mux_set, }; static const struct sparx5_match_data sparx5_desc = { diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h index b6abbae119c2..8d985dfb65eb 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -267,6 +267,8 @@ struct sparx5_ops { u32 (*get_port_dev_bit)(struct sparx5 *sparx5, int port); u32 (*get_hsch_max_group_rate)(int grp); struct sparx5_sdlb_group *(*get_sdlb_group)(int idx); + int (*set_port_mux)(struct sparx5 *sparx5, struct sparx5_port *port, + struct sparx5_port_config *conf); }; struct sparx5_main_io_resource { @@ -485,6 +487,10 @@ int sparx5_pool_get(struct sparx5_pool_entry *pool, int size, u32 *id); int sparx5_pool_get_with_idx(struct sparx5_pool_entry *pool, int size, u32 idx, u32 *id); +/* sparx5_port.c */ +int sparx5_port_mux_set(struct sparx5 *sparx5, struct sparx5_port *port, + struct sparx5_port_config *conf); + /* sparx5_sdlb.c */ #define SPX5_SDLB_PUP_TOKEN_DISABLE 0x1FFF #define SPX5_SDLB_PUP_TOKEN_MAX (SPX5_SDLB_PUP_TOKEN_DISABLE - 1) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c index 49ff94db0e63..0dc2201fe653 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c @@ -516,9 +516,8 @@ static int sparx5_port_fifo_sz(struct sparx5 *sparx5, /* Configure port muxing: * QSGMII: 4x2G5 devices */ -static int sparx5_port_mux_set(struct sparx5 *sparx5, - struct sparx5_port *port, - struct sparx5_port_config *conf) +int sparx5_port_mux_set(struct sparx5 *sparx5, struct sparx5_port *port, + struct sparx5_port_config *conf) { u32 portno = port->portno; u32 inst; @@ -1039,7 +1038,7 @@ int sparx5_port_init(struct sparx5 *sparx5, pcsinst = spx5_inst_get(sparx5, pcs, pix); /* Set the mux port mode */ - err = sparx5_port_mux_set(sparx5, port, conf); + err = ops->set_port_mux(sparx5, port, conf); if (err) return err;