From patchwork Fri Oct 4 13:19:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Machon X-Patchwork-Id: 13822380 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 87285CFA77B for ; Fri, 4 Oct 2024 13:37:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=FIptX4Mi60YmQYeiAzu/UEL2Kr9vpG2nOBZLMkN7M5I=; b=VAoJ80Q6q/T6XlFeedFioQKIkF QfmicPYvg3jH1hBfztDKs5TIUslM/UgdIUoFOjBjCLSvaItTPCRixJIDc+oPM34kBR2xbGiikoOos MOwWIJYN4In6zWgC/hWgsPKP1ubAYlZ7eJjG6zKkUtbCJbaanx0vvJJh+vUnIFQQpRdVx0JukwpDk qrZumnb1Cl4tV8beYLxV3PRZ1pknXKbAtv5CvvSw+QXP8SaH97Hbjw5Nfie6wA1t7lGGQaSvGh5CA KOdVhEB8AuDdvUAva3BQw7WkhOflZvpMHRF/YGxGCOTproslh/IsOsOCuWUdqcdS2HrTnSnD2Mmxw UTweOoDw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1swiUU-0000000CZFB-1TWt; Fri, 04 Oct 2024 13:37:06 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1swiEm-0000000CUKF-33BA for linux-arm-kernel@lists.infradead.org; Fri, 04 Oct 2024 13:20:54 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1728048053; x=1759584053; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=hfzpNQys/id9m01aF8z14rGWYggvryDo1BAUlakEWWA=; b=PylbHWX1tckFr+mAyB1PDn9dlSuDmWgfPkbtRmwOUJZSAFekuLrGnmw8 AVMx394P0NCOJkhR4ECEZEgvUwfRYkQL2by4FU0ebpe0Xeht8Ii7NxUuy k38GEcN++JkTKY3fcDMLQgmurJxt/Vw7DDMfwNeriz0lg5HGHBz5gcXTS R94ULz48q3CV68ohrusLrZ/Dxp2c8jYTWLIEgylc6ri9oBKQi2kBFPL3c AcejJnrJkSKQrd9MhXHvV39pX1vEJRRZImRWrQY3Uq6dItVyhAIg9sOhm 2mVYiQMRkfNuB0HhoQsO7ASHiHH9+2Up6M4yqzT6QkcRdb4FL8KBbQUK3 w==; X-CSE-ConnectionGUID: ijig+GXpR1+FjNkYwRnQGA== X-CSE-MsgGUID: Qa1+VJJHTv2SB7pwn3rPdA== X-IronPort-AV: E=Sophos;i="6.11,177,1725346800"; d="scan'208";a="32602259" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Oct 2024 06:20:51 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 4 Oct 2024 06:20:43 -0700 Received: from DEN-DL-M70577.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 4 Oct 2024 06:20:40 -0700 From: Daniel Machon Date: Fri, 4 Oct 2024 15:19:38 +0200 Subject: [PATCH net-next v2 12/15] net: sparx5: ops out PTP IRQ handler MIME-Version: 1.0 Message-ID: <20241004-b4-sparx5-lan969x-switch-driver-v2-12-d3290f581663@microchip.com> References: <20241004-b4-sparx5-lan969x-switch-driver-v2-0-d3290f581663@microchip.com> In-Reply-To: <20241004-b4-sparx5-lan969x-switch-driver-v2-0-d3290f581663@microchip.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lars Povlsen , "Steen Hegelund" , , , , Richard Cochran , , , , , , CC: , , X-Mailer: b4 0.14-dev X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241004_062052_943356_BA322CD7 X-CRM114-Status: GOOD ( 13.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The PTP registers are located in two different register targets on Sparx5 and lan969x. We can't handle this with the register macros, so ops out the handler. Reviewed-by: Steen Hegelund Reviewed-by: Jacob Keller Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/sparx5_main.c | 4 +++- drivers/net/ethernet/microchip/sparx5/sparx5_main.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c index 33d89461f0f4..393ee5116004 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -605,6 +605,7 @@ static int sparx5_start(struct sparx5 *sparx5) { u8 broadcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; const struct sparx5_consts *consts = sparx5->data->consts; + const struct sparx5_ops *ops = sparx5->data->ops; char queue_name[32]; u32 idx; int err; @@ -729,7 +730,7 @@ static int sparx5_start(struct sparx5 *sparx5) if (sparx5->ptp_irq >= 0) { err = devm_request_threaded_irq(sparx5->dev, sparx5->ptp_irq, - NULL, sparx5_ptp_irq_handler, + NULL, ops->ptp_irq_handler, IRQF_ONESHOT, "sparx5-ptp", sparx5); if (err) @@ -993,6 +994,7 @@ static const struct sparx5_ops sparx5_ops = { .get_hsch_max_group_rate = &sparx5_get_hsch_max_group_rate, .get_sdlb_group = &sparx5_get_sdlb_group, .set_port_mux = &sparx5_port_mux_set, + .ptp_irq_handler = &sparx5_ptp_irq_handler, }; static const struct sparx5_match_data sparx5_desc = { diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h index 8d985dfb65eb..cc8ab91d9805 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -269,6 +269,8 @@ struct sparx5_ops { struct sparx5_sdlb_group *(*get_sdlb_group)(int idx); int (*set_port_mux)(struct sparx5 *sparx5, struct sparx5_port *port, struct sparx5_port_config *conf); + + irqreturn_t (*ptp_irq_handler)(int irq, void *args); }; struct sparx5_main_io_resource {