From patchwork Fri Oct 4 13:19:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Machon X-Patchwork-Id: 13822356 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8220ACFA779 for ; Fri, 4 Oct 2024 13:23:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ABc2LYJWRsK5cYSj41fJcFSLXu2gXp1OOsit4i9Ljic=; b=ZZA3vCzfQSykEOkyBfdp+AEpwY SRVdAdyl+dcvd2tBZnC6urBsAkjH9EOUjwoiI17FYAxGsPOdnSwKJRte8Rm71/ij1s9JB6jUa0XEA F1SkeFi+WoXxLw3ABpbwLrhKfbvdRxJfwCn2YMVoqT12sEuGEJ4wSbMxFAdCsq9EAPCgUxGgGzwlc vhN/clF99EcWRvTTeQDdLO8jRbC/xGOJBc/TtrTjJohBKlXPxInl/Z0yz/EeGQjDpnBSP/Og0m9+O C5HAy0VKKTqLPFPcYsUePl5Zr2fOZajuHIT6rVemmN+fXueQNFAncEImEvLo/EZaalLjfF5N3G2Tf uaBrDzkw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1swiGo-0000000CV5w-1R5q; Fri, 04 Oct 2024 13:22:58 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1swiEL-0000000CU7C-1CNH for linux-arm-kernel@lists.infradead.org; Fri, 04 Oct 2024 13:20:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1728048025; x=1759584025; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=CgHV7zzECy6AFjL6MoJBT+5hW9Hpgx+yuI+1h+oezOg=; b=zpx7jFkL44ehrReJAWxgbiBZIR/wq44Oq6rARuUDZT9Zj0Cb+IcxjW05 4X2TVP8Bot5WQhgZzcGlz40une6ECL6PejjzaqK+dRr49SreYqKCzdGvm LfzxaySu13OvCFL8OitTDQu0poXKF0LmtPpu0oDoFeu6mdnI02KoER1V9 4BKoVEUt7RHCdeh+F6ZYKKV6ssuMYShKNQRV53tNuj+gNCVGG8QQ6R1i8 4Iic3S1v6qmb+Ne4oDmaEW2GY3SD8zr189A039kTyt0JdpXTp8bOKKBgO QyyE3PcE0+00bJgaAOZpdLewse0+sr7HHTFiv7KxXRrbNrjVHu6typiHC w==; X-CSE-ConnectionGUID: UTORMraqRXG6dgK0XgLrnQ== X-CSE-MsgGUID: jQK1bQYlRo6NuRifnInbvw== X-IronPort-AV: E=Sophos;i="6.11,177,1725346800"; d="scan'208";a="35903131" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 Oct 2024 06:20:19 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 4 Oct 2024 06:20:13 -0700 Received: from DEN-DL-M70577.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 4 Oct 2024 06:20:10 -0700 From: Daniel Machon Date: Fri, 4 Oct 2024 15:19:29 +0200 Subject: [PATCH net-next v2 03/15] net: sparx5: modify SPX5_PORTS_ALL macro MIME-Version: 1.0 Message-ID: <20241004-b4-sparx5-lan969x-switch-driver-v2-3-d3290f581663@microchip.com> References: <20241004-b4-sparx5-lan969x-switch-driver-v2-0-d3290f581663@microchip.com> In-Reply-To: <20241004-b4-sparx5-lan969x-switch-driver-v2-0-d3290f581663@microchip.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lars Povlsen , "Steen Hegelund" , , , , Richard Cochran , , , , , , CC: , , X-Mailer: b4 0.14-dev X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241004_062025_385501_95D4D384 X-CRM114-Status: GOOD ( 10.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In preparation for lan969x, we need to define the SPX5_PORTS_ALL macro as 70 (65 front ports + 5 internal ports). This is required as the SPX5_PORT_CPU will be redefined as an offset to the number of front ports, in a subsequent patch. Reviewed-by: Steen Hegelund Reviewed-by: Jacob Keller Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/sparx5_main.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h index 31c212bdbaae..4988d9b90286 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -52,13 +52,14 @@ enum sparx5_vlan_port_type { }; #define SPX5_PORTS 65 +#define SPX5_PORTS_ALL 70 /* Total number of ports */ + #define SPX5_PORT_CPU (SPX5_PORTS) /* Next port is CPU port */ #define SPX5_PORT_CPU_0 (SPX5_PORT_CPU + 0) /* CPU Port 65 */ #define SPX5_PORT_CPU_1 (SPX5_PORT_CPU + 1) /* CPU Port 66 */ #define SPX5_PORT_VD0 (SPX5_PORT_CPU + 2) /* VD0/Port 67 used for IPMC */ #define SPX5_PORT_VD1 (SPX5_PORT_CPU + 3) /* VD1/Port 68 used for AFI/OAM */ #define SPX5_PORT_VD2 (SPX5_PORT_CPU + 4) /* VD2/Port 69 used for IPinIP*/ -#define SPX5_PORTS_ALL (SPX5_PORT_CPU + 5) /* Total number of ports */ #define PGID_BASE SPX5_PORTS /* Starts after port PGIDs */ #define PGID_UC_FLOOD (PGID_BASE + 0)