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AJvYcCXXCw5VdgBalSEWaCREPN7ariiSUzdjx3oh65tQRFZ8Ssv/DEL+Mcjbug/if2Qp+AOhkecgD170FJK6h+F8Qqxs@lists.infradead.org X-Gm-Message-State: AOJu0Yw0HO/LifQYcAP1aay5NxK1eJOHG8RMyC9gav9iQTnwnRR6WJ8r isNmJfU9eRdXmub6Us5497XrSp0D/adYHWFUT6uGBuDlX/jGvt3z9nD7KQvHfg== X-Google-Smtp-Source: AGHT+IGP0jvF/5pSOypEO+vc/qNSUNVQ+HbJ9vh7v4FjbPL7yc7D1XiNikXcjrWfP5UtVy01MXm7SA== X-Received: by 2002:a17:902:ecc9:b0:20b:4f95:9325 with SMTP id d9443c01a7336-20bfdfb4cdbmr30094245ad.17.1728029573988; Fri, 04 Oct 2024 01:12:53 -0700 (PDT) Received: from fshao-p620.tpe.corp.google.com ([2401:fa00:1:10:73bb:cecf:e651:2ce6]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20beefad264sm19401305ad.205.2024.10.04.01.12.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2024 01:12:53 -0700 (PDT) From: Fei Shao To: AngeloGioacchino Del Regno , Matthias Brugger Cc: Fei Shao , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 3/9] arm64: dts: mediatek: mt8188: Add MIPI DSI nodes Date: Fri, 4 Oct 2024 16:11:55 +0800 Message-ID: <20241004081218.55962-4-fshao@chromium.org> X-Mailer: git-send-email 2.47.0.rc0.187.ge670bccf7e-goog In-Reply-To: <20241004081218.55962-1-fshao@chromium.org> References: <20241004081218.55962-1-fshao@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241004_011254_716389_46281C62 X-CRM114-Status: GOOD ( 11.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add two MIPI DSI nodes and the associated PHY nodes to support DSI panels. Individual board device tree should enable the nodes as needed. Signed-off-by: Fei Shao --- Changes in v3: - add the secondary MIPI DSI arch/arm64/boot/dts/mediatek/mt8188.dtsi | 51 ++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi index 3cc00a898cc9..d39940ed6f5c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -1844,6 +1844,26 @@ pcieport: pcie-phy@0 { }; }; + mipi_tx_config0: dsi-phy@11c80000 { + compatible = "mediatek,mt8188-mipi-tx", "mediatek,mt8183-mipi-tx"; + reg = <0 0x11c80000 0 0x1000>; + clocks = <&clk26m>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; + }; + + mipi_tx_config1: dsi-phy@11c90000 { + compatible = "mediatek,mt8188-mipi-tx", "mediatek,mt8183-mipi-tx"; + reg = <0 0x11c90000 0 0x1000>; + clocks = <&clk26m>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; + }; + i2c1: i2c@11e00000 { compatible = "mediatek,mt8188-i2c"; reg = <0 0x11e00000 0 0x1000>, @@ -2229,10 +2249,41 @@ larb19: smi@1a010000 { mediatek,smi = <&vdo_smi_common>; }; + disp_dsi0: dsi@1c008000 { + compatible = "mediatek,mt8188-dsi"; + reg = <0 0x1c008000 0 0x1000>; + clocks = <&vdosys0 CLK_VDO0_DSI0>, + <&vdosys0 CLK_VDO0_DSI0_DSI>, + <&mipi_tx_config0>; + clock-names = "engine", "digital", "hs"; + interrupts = ; + phys = <&mipi_tx_config0>; + phy-names = "dphy"; + power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS0>; + resets = <&vdosys0 MT8188_VDO0_RST_DSI0>; + status = "disabled"; + }; + + disp_dsi1: dsi@1c012000 { + compatible = "mediatek,mt8188-dsi"; + reg = <0 0x1c012000 0 0x1000>; + clocks = <&vdosys0 CLK_VDO0_DSI1>, + <&vdosys0 CLK_VDO0_DSI1_DSI>, + <&mipi_tx_config1>; + clock-names = "engine", "digital", "hs"; + interrupts = ; + phys = <&mipi_tx_config1>; + phy-names = "dphy"; + power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS0>; + resets = <&vdosys0 MT8188_VDO0_RST_DSI1>; + status = "disabled"; + }; + vdosys0: syscon@1c01d000 { compatible = "mediatek,mt8188-vdosys0", "syscon"; reg = <0 0x1c01d000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; mboxes = <&gce0 0 CMDQ_THR_PRIO_4>; mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xd000 0x1000>; };