From patchwork Fri Oct 4 15:24:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Francesco Dolcini X-Patchwork-Id: 13822579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 205A5CF8849 for ; Fri, 4 Oct 2024 15:30:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=K6Z3oNeKFKx8bkxnmXTRsD0CwVcOpRTtG+ExOpbstjE=; b=dBGZ+LQZIvEKavQZL9cnJZCIBB p3xeI0J2PKusAITy3qTFb+9Bv7JO4cDN4vJ+hwsQAcg0Ok1oykGWLe9Xj+G5yWmAMiIEgU8iAA5ex skWDirrPKs/fwroeVGnYICeuiERUaavCOUmG2B4ktfQJMyvkGrt2Pt0WpFOSjfCui5X357tNtQ5Jr Bmhu5REXwREXyiTkOyBB+JZCW0gNmQKmzBIzHJN6DssvooaAMKuO+5iWU/7P7mbTvhlzLzIlXejxf 93v+650fk9JbELWcXjvDzvmKP0cSI2QYjQKjxFhKfUonH0pnBcr4KYf24iJs9Vfs+MlKJT/7cjRwB f8rfPstw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1swkFY-0000000D0Bp-0GxL; Fri, 04 Oct 2024 15:29:48 +0000 Received: from mail11.truemail.it ([2001:4b7e:0:8::81]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1swkAX-0000000CyjK-3yQq for linux-arm-kernel@lists.infradead.org; Fri, 04 Oct 2024 15:24:40 +0000 Received: from francesco-nb.pivistrello.it (93-49-2-63.ip317.fastwebnet.it [93.49.2.63]) by mail11.truemail.it (Postfix) with ESMTPA id AEFD620BC4; Fri, 4 Oct 2024 17:24:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1728055470; bh=K6Z3oNeKFKx8bkxnmXTRsD0CwVcOpRTtG+ExOpbstjE=; h=From:To:Subject; b=JX+Qc1NALyA4j/FMFMMFG/SjIJWapIhcaHzypuXTKFZHqmyW97hRqCFekintLv/44 wNn0f6k0EQNEVdTRcw7x+hb1D6pF6IYs3SaNq5Dnkepnj0ue7RAOdfB9E5ANrnljLs 3KJu1t3LFT75Bj41SgGEH1HZtVzYPmyq4Nu7MzxVRUnUuQXOSBwk7sp0pRSVVaVAeG 96bfItOkS/9qzu2QCdJTbYBObPmZkG3wxfhqQ3k3LVYymDL9KdfC/4Cohhk+4z9Dml EBG7xA+8X39q75KBB9/A5i6oxwiNZwYwXRpQ2rWRTx6KLlxlaSRSxXsmuv7QqAizM/ vz1NjCPVS48bA== From: Francesco Dolcini To: Wei Fang , Shenwei Wang , Clark Wang , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Richard Cochran , Linux Team Cc: Francesco Dolcini , imx@lists.linux.dev, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v4 1/3] dt-bindings: net: fec: add pps channel property Date: Fri, 4 Oct 2024 17:24:17 +0200 Message-Id: <20241004152419.79465-2-francesco@dolcini.it> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241004152419.79465-1-francesco@dolcini.it> References: <20241004152419.79465-1-francesco@dolcini.it> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241004_082438_175030_F4833528 X-CRM114-Status: UNSURE ( 8.58 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Francesco Dolcini Add fsl,pps-channel property to select where to connect the PPS signal. This depends on the internal SoC routing and on the board, for example on the i.MX8 SoC it can be connected to an external pin (using channel 1) or to internal eDMA as DMA request (channel 0). Signed-off-by: Francesco Dolcini Acked-by: Conor Dooley --- v4: improve commit message and explain why this is needed, as requested by Conor Dooley. v3: no changes v2: no changes --- Documentation/devicetree/bindings/net/fsl,fec.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml index 5536c06139ca..24e863fdbdab 100644 --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml @@ -183,6 +183,13 @@ properties: description: Register bits of stop mode control, the format is <&gpr req_gpr req_bit>. + fsl,pps-channel: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + description: + Specifies to which timer instance the PPS signal is routed. + enum: [0, 1, 2, 3] + mdio: $ref: mdio.yaml# unevaluatedProperties: false