diff mbox series

[v16,5/5] iommu/arm-smmu: add ACTLR data and support for qcom_smmu_500

Message ID 20241008125410.3422512-6-quic_bibekkum@quicinc.com (mailing list archive)
State New, archived
Headers show
Series iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs | expand

Commit Message

Bibek Kumar Patro Oct. 8, 2024, 12:54 p.m. UTC 
Add ACTLR data table for qcom_smmu_500 including
corresponding data entry and set prefetch value by
way of a list of compatible strings.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
---
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)

--
2.34.1

Comments

Rob Clark Oct. 28, 2024, 9:16 p.m. UTC | #1 
On Tue, Oct 8, 2024 at 5:55 AM Bibek Kumar Patro
<quic_bibekkum@quicinc.com> wrote:
>
> Add ACTLR data table for qcom_smmu_500 including
> corresponding data entry and set prefetch value by
> way of a list of compatible strings.
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
> ---
>  drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 24 ++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
>
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index 2d2c1e75632c..dd4fb883ebcd 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> @@ -25,8 +25,31 @@
>
>  #define CPRE                   (1 << 1)
>  #define CMTLB                  (1 << 0)
> +#define PREFETCH_SHIFT         8
> +#define PREFETCH_DEFAULT       0
> +#define PREFETCH_SHALLOW       (1 << PREFETCH_SHIFT)
> +#define PREFETCH_MODERATE      (2 << PREFETCH_SHIFT)
> +#define PREFETCH_DEEP          (3 << PREFETCH_SHIFT)
>  #define GFX_ACTLR_PRR          (1 << 5)
>
> +static const struct of_device_id qcom_smmu_actlr_client_of_match[] = {
> +       { .compatible = "qcom,adreno",
> +                       .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
> +       { .compatible = "qcom,adreno-gmu",
> +                       .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
> +       { .compatible = "qcom,adreno-smmu",
> +                       .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
> +       { .compatible = "qcom,fastrpc",
> +                       .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
> +       { .compatible = "qcom,sc7280-mdss",
> +                       .data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
> +       { .compatible = "qcom,sc7280-venus",
> +                       .data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
> +       { .compatible = "qcom,sm8550-mdss",
> +                       .data = (const void *) (PREFETCH_DEFAULT | CMTLB) },
> +       { }
> +};

I guess by now there are some more entries to add
("qcom,x1e80100-mdss", for example), but I guess those could be
followup patches

Reviewed-by: Rob Clark <robdclark@gmail.com>

> +
>  static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu)
>  {
>         return container_of(smmu, struct qcom_smmu, smmu);
> @@ -640,6 +663,7 @@ static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
>         .impl = &qcom_smmu_500_impl,
>         .adreno_impl = &qcom_adreno_smmu_500_impl,
>         .cfg = &qcom_smmu_impl0_cfg,
> +       .client_match = qcom_smmu_actlr_client_of_match,
>  };
>
>  /*
> --
> 2.34.1
>
Bibek Kumar Patro Oct. 29, 2024, 12:40 p.m. UTC | #2 
On 10/29/2024 2:46 AM, Rob Clark wrote:
> On Tue, Oct 8, 2024 at 5:55 AM Bibek Kumar Patro
> <quic_bibekkum@quicinc.com> wrote:
>>
>> Add ACTLR data table for qcom_smmu_500 including
>> corresponding data entry and set prefetch value by
>> way of a list of compatible strings.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
>> ---
>>   drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 24 ++++++++++++++++++++++
>>   1 file changed, 24 insertions(+)
>>
>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> index 2d2c1e75632c..dd4fb883ebcd 100644
>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> @@ -25,8 +25,31 @@
>>
>>   #define CPRE                   (1 << 1)
>>   #define CMTLB                  (1 << 0)
>> +#define PREFETCH_SHIFT         8
>> +#define PREFETCH_DEFAULT       0
>> +#define PREFETCH_SHALLOW       (1 << PREFETCH_SHIFT)
>> +#define PREFETCH_MODERATE      (2 << PREFETCH_SHIFT)
>> +#define PREFETCH_DEEP          (3 << PREFETCH_SHIFT)
>>   #define GFX_ACTLR_PRR          (1 << 5)
>>
>> +static const struct of_device_id qcom_smmu_actlr_client_of_match[] = {
>> +       { .compatible = "qcom,adreno",
>> +                       .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>> +       { .compatible = "qcom,adreno-gmu",
>> +                       .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>> +       { .compatible = "qcom,adreno-smmu",
>> +                       .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>> +       { .compatible = "qcom,fastrpc",
>> +                       .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>> +       { .compatible = "qcom,sc7280-mdss",
>> +                       .data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
>> +       { .compatible = "qcom,sc7280-venus",
>> +                       .data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
>> +       { .compatible = "qcom,sm8550-mdss",
>> +                       .data = (const void *) (PREFETCH_DEFAULT | CMTLB) },
>> +       { }
>> +};
> 
> I guess by now there are some more entries to add
> ("qcom,x1e80100-mdss", for example), but I guess those could be
> followup patches
> 
> Reviewed-by: Rob Clark <robdclark@gmail.com>
> 

Thanks everyone for valuable inputs, reviews and ack.

regards,
Bibek

>> +
>>   static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu)
>>   {
>>          return container_of(smmu, struct qcom_smmu, smmu);
>> @@ -640,6 +663,7 @@ static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
>>          .impl = &qcom_smmu_500_impl,
>>          .adreno_impl = &qcom_adreno_smmu_500_impl,
>>          .cfg = &qcom_smmu_impl0_cfg,
>> +       .client_match = qcom_smmu_actlr_client_of_match,
>>   };
>>
>>   /*
>> --
>> 2.34.1
>>
Robin Murphy Oct. 29, 2024, 1:36 p.m. UTC | #3 
On 2024-10-08 1:54 pm, Bibek Kumar Patro wrote:
> Add ACTLR data table for qcom_smmu_500 including
> corresponding data entry and set prefetch value by
> way of a list of compatible strings.

Hmm, I'd still be inclined to combine this into the existing 
qcom_smmu_client_of_match table by generalising the match data (i.e. 
make an explicit "wants an identity domain" flag as well), but that 
could always be tried later. This is pleasantly inoffensive enough as it 
is, compared to the previous idea :)

Acked-by: Robin Murphy <robin.murphy@arm.com>

> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
> ---
>   drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 24 ++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
> 
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index 2d2c1e75632c..dd4fb883ebcd 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> @@ -25,8 +25,31 @@
> 
>   #define CPRE			(1 << 1)
>   #define CMTLB			(1 << 0)
> +#define PREFETCH_SHIFT		8
> +#define PREFETCH_DEFAULT	0
> +#define PREFETCH_SHALLOW	(1 << PREFETCH_SHIFT)
> +#define PREFETCH_MODERATE	(2 << PREFETCH_SHIFT)
> +#define PREFETCH_DEEP		(3 << PREFETCH_SHIFT)
>   #define GFX_ACTLR_PRR		(1 << 5)
> 
> +static const struct of_device_id qcom_smmu_actlr_client_of_match[] = {
> +	{ .compatible = "qcom,adreno",
> +			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
> +	{ .compatible = "qcom,adreno-gmu",
> +			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
> +	{ .compatible = "qcom,adreno-smmu",
> +			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
> +	{ .compatible = "qcom,fastrpc",
> +			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
> +	{ .compatible = "qcom,sc7280-mdss",
> +			.data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
> +	{ .compatible = "qcom,sc7280-venus",
> +			.data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
> +	{ .compatible = "qcom,sm8550-mdss",
> +			.data = (const void *) (PREFETCH_DEFAULT | CMTLB) },
> +	{ }
> +};
> +
>   static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu)
>   {
>   	return container_of(smmu, struct qcom_smmu, smmu);
> @@ -640,6 +663,7 @@ static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
>   	.impl = &qcom_smmu_500_impl,
>   	.adreno_impl = &qcom_adreno_smmu_500_impl,
>   	.cfg = &qcom_smmu_impl0_cfg,
> +	.client_match = qcom_smmu_actlr_client_of_match,
>   };
> 
>   /*
> --
> 2.34.1
>
diff mbox series

Patch

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 2d2c1e75632c..dd4fb883ebcd 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -25,8 +25,31 @@ 

 #define CPRE			(1 << 1)
 #define CMTLB			(1 << 0)
+#define PREFETCH_SHIFT		8
+#define PREFETCH_DEFAULT	0
+#define PREFETCH_SHALLOW	(1 << PREFETCH_SHIFT)
+#define PREFETCH_MODERATE	(2 << PREFETCH_SHIFT)
+#define PREFETCH_DEEP		(3 << PREFETCH_SHIFT)
 #define GFX_ACTLR_PRR		(1 << 5)

+static const struct of_device_id qcom_smmu_actlr_client_of_match[] = {
+	{ .compatible = "qcom,adreno",
+			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
+	{ .compatible = "qcom,adreno-gmu",
+			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
+	{ .compatible = "qcom,adreno-smmu",
+			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
+	{ .compatible = "qcom,fastrpc",
+			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
+	{ .compatible = "qcom,sc7280-mdss",
+			.data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
+	{ .compatible = "qcom,sc7280-venus",
+			.data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
+	{ .compatible = "qcom,sm8550-mdss",
+			.data = (const void *) (PREFETCH_DEFAULT | CMTLB) },
+	{ }
+};
+
 static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu)
 {
 	return container_of(smmu, struct qcom_smmu, smmu);
@@ -640,6 +663,7 @@  static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
 	.impl = &qcom_smmu_500_impl,
 	.adreno_impl = &qcom_adreno_smmu_500_impl,
 	.cfg = &qcom_smmu_impl0_cfg,
+	.client_match = qcom_smmu_actlr_client_of_match,
 };

 /*