From patchwork Mon Oct 14 10:58:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Roberts X-Patchwork-Id: 13834900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C3822D16252 for ; Mon, 14 Oct 2024 12:19:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=11sxvXvLRPO0HsHmpSNAXFOkl+67WniK18hQuyFjNNA=; b=f3NEMAW0ulIVee6cT2t/rKB6zT aH0mdraZmrst7ren804doG0/sBQXYCppDGk5KQ4kfwVWV4o5wQC4oaLdAxbinth7eibS68XK+IUc6 MrzMbUgrr2avdElGnkG0ue2MaQg5REMwM9V/CR+bPzG4LDFExliVTSt7exVdD7MCLbDwHk7CcePUw RkVDU2tMCIpbiOrUwRVkyyTAPYSlAKa0lcFKDIaDpS3+SVUH2sGlggoH2jCryelhlQzt/xEbKaUxK JmnY6UqBbRWZBEzYny5oSknb39X5FC7Mj047AqNYM6eBSfHsPg2ec9C7ndoRKht5MNMTWnDLsucSC HpfqZCoA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t0K2G-000000053cl-12YJ; Mon, 14 Oct 2024 12:18:52 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t0IpN-00000004oMq-1vcd for linux-arm-kernel@lists.infradead.org; Mon, 14 Oct 2024 11:01:31 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6F1811756; Mon, 14 Oct 2024 04:01:58 -0700 (PDT) Received: from e125769.cambridge.arm.com (e125769.cambridge.arm.com [10.1.196.27]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6E88C3F51B; Mon, 14 Oct 2024 04:01:26 -0700 (PDT) From: Ryan Roberts To: Andrew Morton , Anshuman Khandual , Ard Biesheuvel , Catalin Marinas , David Hildenbrand , Greg Marsden , Ivan Ivanov , Kalesh Singh , Marc Zyngier , Mark Rutland , Matthias Brugger , Miroslav Benes , Will Deacon Cc: Ryan Roberts , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: [RFC PATCH v1 39/57] arm64: Introduce macros required for boot-time page selection Date: Mon, 14 Oct 2024 11:58:46 +0100 Message-ID: <20241014105912.3207374-39-ryan.roberts@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241014105912.3207374-1-ryan.roberts@arm.com> References: <20241014105514.3206191-1-ryan.roberts@arm.com> <20241014105912.3207374-1-ryan.roberts@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241014_040129_670714_99E4AB2B X-CRM114-Status: GOOD ( 15.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This minmal set of macros will allow boot-time page selection support to be added to the arm64 arch code incrementally over the following set of patches. The definitions in pgtable-geometry.h are for compile-time page size currently, but they will be modified in future to support boot-time page size. Signed-off-by: Ryan Roberts --- ***NOTE*** Any confused maintainers may want to read the cover note here for context: https://lore.kernel.org/all/20241014105514.3206191-1-ryan.roberts@arm.com/ arch/arm64/include/asm/page-def.h | 5 ++-- arch/arm64/include/asm/pgtable-geometry.h | 28 +++++++++++++++++++++++ arch/arm64/include/asm/pgtable-hwdef.h | 16 ++++++++----- 3 files changed, 40 insertions(+), 9 deletions(-) create mode 100644 arch/arm64/include/asm/pgtable-geometry.h diff --git a/arch/arm64/include/asm/page-def.h b/arch/arm64/include/asm/page-def.h index d69971cf49cd2..b99dee0112463 100644 --- a/arch/arm64/include/asm/page-def.h +++ b/arch/arm64/include/asm/page-def.h @@ -9,12 +9,11 @@ #define __ASM_PAGE_DEF_H #include +#include /* PAGE_SHIFT determines the page size */ -#define PAGE_SHIFT CONFIG_PAGE_SHIFT +#define PAGE_SHIFT ptg_page_shift #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) -#include - #endif /* __ASM_PAGE_DEF_H */ diff --git a/arch/arm64/include/asm/pgtable-geometry.h b/arch/arm64/include/asm/pgtable-geometry.h new file mode 100644 index 0000000000000..62fe125909c08 --- /dev/null +++ b/arch/arm64/include/asm/pgtable-geometry.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef ASM_PGTABLE_GEOMETRY_H +#define ASM_PGTABLE_GEOMETRY_H + +#define ARM64_PAGE_SHIFT_4K 12 +#define ARM64_PAGE_SHIFT_16K 14 +#define ARM64_PAGE_SHIFT_64K 16 + +#define PAGE_SHIFT_MIN CONFIG_PAGE_SHIFT +#define PAGE_SIZE_MIN (_AC(1, UL) << PAGE_SHIFT_MIN) +#define PAGE_MASK_MIN (~(PAGE_SIZE_MIN-1)) + +#define PAGE_SHIFT_MAX CONFIG_PAGE_SHIFT +#define PAGE_SIZE_MAX (_AC(1, UL) << PAGE_SHIFT_MAX) +#define PAGE_MASK_MAX (~(PAGE_SIZE_MAX-1)) + +#include + +#define ptg_page_shift CONFIG_PAGE_SHIFT +#define ptg_pmd_shift ARM64_HW_PGTABLE_LEVEL_SHIFT(2) +#define ptg_pud_shift ARM64_HW_PGTABLE_LEVEL_SHIFT(1) +#define ptg_p4d_shift ARM64_HW_PGTABLE_LEVEL_SHIFT(0) +#define ptg_pgdir_shift ARM64_HW_PGTABLE_LEVEL_SHIFT(4 - CONFIG_PGTABLE_LEVELS) +#define ptg_cont_pte_shift (CONFIG_ARM64_CONT_PTE_SHIFT + PAGE_SHIFT) +#define ptg_cont_pmd_shift (CONFIG_ARM64_CONT_PMD_SHIFT + PMD_SHIFT) +#define ptg_pgtable_levels CONFIG_PGTABLE_LEVELS + +#endif /* ASM_PGTABLE_GEOMETRY_H */ diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index 1f60aa1bc750c..54a9153f56bc5 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -41,39 +41,43 @@ #define ARM64_HW_PGTABLE_LEVEL_SHIFT(n) ((PAGE_SHIFT - 3) * (4 - (n)) + 3) #define PTRS_PER_PTE (1 << (PAGE_SHIFT - 3)) +#define MAX_PTRS_PER_PTE (1 << (PAGE_SHIFT_MAX - 3)) /* * PMD_SHIFT determines the size a level 2 page table entry can map. */ #if CONFIG_PGTABLE_LEVELS > 2 -#define PMD_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(2) +#define PMD_SHIFT ptg_pmd_shift #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) #define PTRS_PER_PMD (1 << (PAGE_SHIFT - 3)) +#define MAX_PTRS_PER_PMD (1 << (PAGE_SHIFT_MAX - 3)) #endif /* * PUD_SHIFT determines the size a level 1 page table entry can map. */ #if CONFIG_PGTABLE_LEVELS > 3 -#define PUD_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(1) +#define PUD_SHIFT ptg_pud_shift #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) #define PUD_MASK (~(PUD_SIZE-1)) #define PTRS_PER_PUD (1 << (PAGE_SHIFT - 3)) +#define MAX_PTRS_PER_PUD (1 << (PAGE_SHIFT_MAX - 3)) #endif #if CONFIG_PGTABLE_LEVELS > 4 -#define P4D_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(0) +#define P4D_SHIFT ptg_p4d_shift #define P4D_SIZE (_AC(1, UL) << P4D_SHIFT) #define P4D_MASK (~(P4D_SIZE-1)) #define PTRS_PER_P4D (1 << (PAGE_SHIFT - 3)) +#define MAX_PTRS_PER_P4D (1 << (PAGE_SHIFT_MAX - 3)) #endif /* * PGDIR_SHIFT determines the size a top-level page table entry can map * (depending on the configuration, this level can be -1, 0, 1 or 2). */ -#define PGDIR_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(4 - CONFIG_PGTABLE_LEVELS) +#define PGDIR_SHIFT ptg_pgdir_shift #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) #define PTRS_PER_PGD (1 << (VA_BITS - PGDIR_SHIFT)) @@ -81,12 +85,12 @@ /* * Contiguous page definitions. */ -#define CONT_PTE_SHIFT (CONFIG_ARM64_CONT_PTE_SHIFT + PAGE_SHIFT) +#define CONT_PTE_SHIFT ptg_cont_pte_shift #define CONT_PTES (1 << (CONT_PTE_SHIFT - PAGE_SHIFT)) #define CONT_PTE_SIZE (CONT_PTES * PAGE_SIZE) #define CONT_PTE_MASK (~(CONT_PTE_SIZE - 1)) -#define CONT_PMD_SHIFT (CONFIG_ARM64_CONT_PMD_SHIFT + PMD_SHIFT) +#define CONT_PMD_SHIFT ptg_cont_pmd_shift #define CONT_PMDS (1 << (CONT_PMD_SHIFT - PMD_SHIFT)) #define CONT_PMD_SIZE (CONT_PMDS * PMD_SIZE) #define CONT_PMD_MASK (~(CONT_PMD_SIZE - 1))