From patchwork Wed Oct 16 23:30:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 13839060 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC806D2F7D2 for ; Wed, 16 Oct 2024 23:32:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=yJPRxcazgjxA07gw7TbK7yglPZYiEd2pkShwp68iM60=; b=L7Va0gqxtfZa+dYt9iWXjq23aT yqaIWv4r35hpt7OaHT1QQtWebfZavjGs4HBT4htRv+/C0vU/+X5IJyFEor1pVlC1hqc82HzcU943r lMv38+sPGjjDBaFJUXO4KFzdGaudXeLd2bW/Gg6wjV4Jq2lFig16kfm49p7IYELu5Xlq50EpE2oP/ ZnNan7K4AH983UjUmjBaCyCWpQOJTuE0b2mXzz1N3rGsXXHMS21LzjcZjJKHdcuG4kKjlBbkqJI7M 60/Bf5LPwc10oi2AXq3bUXL1RWxn0tmTzzIQfSIr6vGzMGG36cuIuB6CoLHsWIWV7rwxZe+Qndp+7 JLSt/kFw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t1DV9-0000000DEV8-0QQs; Wed, 16 Oct 2024 23:32:23 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1DTg-0000000DECI-1vrf for linux-arm-kernel@lists.infradead.org; Wed, 16 Oct 2024 23:30:54 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 49GNUl3s095571; Wed, 16 Oct 2024 18:30:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1729121447; bh=yJPRxcazgjxA07gw7TbK7yglPZYiEd2pkShwp68iM60=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=cpyl2LrjGDyEgzwegVqdNcoZ4avD2NDyNlZ9BahOEazlxrXQ+A7OLcvq927eeCbq6 7IXKxHMbIBK016VOgjeWHvGezx6Ldzpx0t9fDs6eG/iXJeu016TrmeaZZ5FI/y2LtW 3cBjEpu7VgGjxalzyMvKsbQKdWsY194vuUirzTY0= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 49GNUlQ9011745 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 16 Oct 2024 18:30:47 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 16 Oct 2024 18:30:46 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 16 Oct 2024 18:30:46 -0500 Received: from fllvsmtp7.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 49GNUj7k070988; Wed, 16 Oct 2024 18:30:46 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Andrew Davis Subject: [PATCH 3/5] arm64: dts: ti: k3-j7200: Add PCIe ctrl node to scm_conf region Date: Wed, 16 Oct 2024 18:30:42 -0500 Message-ID: <20241016233044.240699-4-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241016233044.240699-1-afd@ti.com> References: <20241016233044.240699-1-afd@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241016_163052_653361_9BB12021 X-CRM114-Status: GOOD ( 12.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This region is used for controlling the function of the PCIe IP. It is compatible with "ti,j784s4-pcie-ctrl", add this here and use it with the PCIe node. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 9386bf3ef9f68..45091aa0fb1b0 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -32,6 +32,11 @@ scm_conf: scm-conf@100000 { #size-cells = <1>; ranges = <0x00 0x00 0x00100000 0x1c000>; + pcie1_ctrl: pcie-ctrl@4074 { + compatible = "ti,j784s4-pcie-ctrl", "syscon"; + reg = <0x4074 0x4>; + }; + serdes_ln_ctrl: mux-controller@4080 { compatible = "reg-mux"; reg = <0x4080 0x20>; @@ -745,7 +750,7 @@ pcie1_rc: pcie@2910000 { interrupt-names = "link_state"; interrupts = ; device_type = "pci"; - ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; + ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>; max-link-speed = <3>; num-lanes = <4>; power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;