From patchwork Fri Oct 18 13:19:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13841781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0894FD3000A for ; Fri, 18 Oct 2024 13:32:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=BTueToM8KZ/WRANPLM2oymKVxyH6UpeHkkFKXDhySoY=; b=kU/RBne9hBfqQoA+fubn3H/GTO ES0SyTPzgZbRbTeLfQheyIVnqsmPvDrqL9Y3/sZp4TVj85ByMh2tgSAGhQ8uvtsZOOhUF8UJYogsb D3UMrdlTAM3xBI6X+9Bag4uLL1D5fjqhXs7X/XkI4Qqnalx0Kby9toJcexHK1gfTKtC/+t8qX/GMg 7fqX9VBN3hC2+XjyCzmEB42hcnkCkIyr8NGsJgJoZQ0F4GgPvrXgPa8IhNmQTXAZ38JR8Ogs5fRbL tQXLaDvyN/wZK/r7yJ+u3b48xRttcQ2vx/9SSXNoMk0PoQaoslxCyfSFjQsFgfMnt6NNWej2Wv8ia VDx6THVA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t1n5d-00000000tEV-32LU; Fri, 18 Oct 2024 13:32:25 +0000 Received: from nyc.source.kernel.org ([147.75.193.91]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1mtK-00000000rJo-35av; Fri, 18 Oct 2024 13:19:44 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id C5D94A43B5B; Fri, 18 Oct 2024 13:19:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D6EB9C4CEC3; Fri, 18 Oct 2024 13:19:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1729257581; bh=eB3BfaRHbAYsShmwieKgK+tyQ9QuJAeGouECbmRe0ng=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ZiXyNnANDDto5wGex3YPjx4ArU1KPSrhedpJYtpLZ1BaAAUvCVtu1WsyDfOffBGSJ 4td1aWS/HTNG+UYaT76FaCTsa4iqtfssCTpW+VI0E6f2+WBOBPavdKTyrbe6F0LZWv 9+hzNrkolUoLEugROSshLgGVEff8Q5Zc45GVnp0MjAzmDlvOBBHhuPjmHfeQVHiLyG dRb/5gVqCYIh5XDT3mV8KId2V/uuitHUK1/Ff+aJwKD8sNeUEAFXtOVOOrytt1fjiX QrEGDtfzhzYOSCWtiZJZvO3cO+T0ZbYHjjUKKl86vHkxZFQZx62HIBa4CM+YB3rgTd ckAF0Y5pQwdrg== From: Lorenzo Bianconi Date: Fri, 18 Oct 2024 15:19:04 +0200 Subject: [PATCH v8 3/6] dt-bindings: pwm: airoha: Add EN7581 pwm MIME-Version: 1.0 Message-Id: <20241018-en7581-pinctrl-v8-3-b676b966a1d1@kernel.org> References: <20241018-en7581-pinctrl-v8-0-b676b966a1d1@kernel.org> In-Reply-To: <20241018-en7581-pinctrl-v8-0-b676b966a1d1@kernel.org> To: Lorenzo Bianconi , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sean Wang , Matthias Brugger , AngeloGioacchino Del Regno , Lee Jones , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= Cc: linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, upstream@airoha.com, benjamin.larsson@genexis.eu, ansuelsmth@gmail.com, linux-pwm@vger.kernel.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241018_061942_942347_9DD61A12 X-CRM114-Status: GOOD ( 12.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Introduce device-tree binding documentation for Airoha EN7581 pwm controller. Co-developed-by: Christian Marangi Signed-off-by: Christian Marangi Signed-off-by: Lorenzo Bianconi Reviewed-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/pwm/airoha,en7581-pwm.yaml | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/airoha,en7581-pwm.yaml b/Documentation/devicetree/bindings/pwm/airoha,en7581-pwm.yaml new file mode 100644 index 0000000000000000000000000000000000000000..fb68c10b037b840a571a2ceee57f13cbae78da66 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/airoha,en7581-pwm.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/airoha,en7581-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha EN7581 PWM Controller + +maintainers: + - Lorenzo Bianconi + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: airoha,en7581-pwm + + "#pwm-cells": + const: 3 + + airoha,74hc595-mode: + description: Set the PWM to handle attached shift register chip 74HC595. + + With this disabled, PWM assume a 74HC164 chip attached. + + The main difference between the 2 chip is the presence of a latch pin + that needs to triggered to apply the configuration and PWM needs to + account for that. + type: boolean + + airoha,sipo-clock-divisor: + description: Declare Shift Register chip clock divisor (clock source is + from SoC APB Clock) + $ref: /schemas/types.yaml#/definitions/uint32 + default: 32 + enum: [4, 8, 16, 32] + + airoha,sipo-clock-delay: + description: Declare Serial GPIO Clock delay. + This can be needed to permit the attached shift register to correctly + setup and apply settings. Value must NOT be greater than + "airoha,sipo-clock-divisor" / 2 + $ref: /schemas/types.yaml#/definitions/uint32 + default: 1 + minimum: 1 + maximum: 16 + +required: + - compatible + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + pwm { + compatible = "airoha,en7581-pwm"; + + #pwm-cells = <3>; + };