| Message ID | 20241018145053.11928-2-didi.debian@cknow.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] arm64: dts: rockchip: Correct GPIO polarity on brcm BT nodes | expand |
On Fri, 18 Oct 2024 16:45:50 +0200, Diederik de Haas wrote: > Paragraph "3.4 Power up Timing Sequence" of the AzureWave-CM256SM > datasheet mentions the following about the BT_REG_ON pin, which is > connected to GPIO0_C4_d: > > When this pin is low and WL_REG_ON is high, > the BT section is in reset. > > [...] Applied, thanks! [1/1] arm64: dts: rockchip: Correct GPIO polarity on brcm BT nodes commit: 273070dad96f046e622173b595e4719b82188376 Best regards,
Hello Diederik, On 2024-10-18 16:45, Diederik de Haas wrote: > Paragraph "3.4 Power up Timing Sequence" of the AzureWave-CM256SM > datasheet mentions the following about the BT_REG_ON pin, which is > connected to GPIO0_C4_d: > > When this pin is low and WL_REG_ON is high, > the BT section is in reset. > > Therefor set that pin to GPIO_ACTIVE_HIGH so that it can be pulled low > for a reset. > If set to GPIO_ACTIVE_LOW, the following errors are observed: > > Bluetooth: hci0: command 0x0c03 tx timeout > Bluetooth: hci0: BCM: Reset failed (-110) > > So fix the GPIO polarity by setting it to ACTIVE_HIGH. > This also matches what other devices with the same BT device have. > > Fixes: a3a625086192 ("arm64: dts: rockchip: Fix reset-gpios property > on brcm BT nodes") > Signed-off-by: Diederik de Haas <didi.debian@cknow.org> I'm a bit late to the party, :) but just wanted to confirm that the information provided in the patch description is correct. > --- > Changes in v2: > - Better commit description with references to the datasheet > - Dropped the (self-)blame as it's not useful to evaluate the > usefulness > of this patch > > arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi | 2 +- > arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi > b/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi > index a477bd992b40..0131f2cdd312 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi > @@ -688,7 +688,7 @@ bluetooth { > host-wakeup-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; > pinctrl-0 = <&bt_enable_h>, <&bt_host_wake_l>, <&bt_wake_h>; > pinctrl-names = "default"; > - shutdown-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; > + shutdown-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; > vbat-supply = <&vcc_wl>; > vddio-supply = <&vcca_1v8_pmu>; > }; > diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi > b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi > index e9fa9bee995a..1e36f73840da 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi > @@ -404,7 +404,7 @@ bluetooth { > host-wakeup-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; > pinctrl-names = "default"; > pinctrl-0 = <&bt_host_wake_h &bt_reg_on_h &bt_wake_host_h>; > - shutdown-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>; > + shutdown-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; > vbat-supply = <&vcc_3v3>; > vddio-supply = <&vcc_1v8>; > };
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi index a477bd992b40..0131f2cdd312 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi @@ -688,7 +688,7 @@ bluetooth { host-wakeup-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&bt_enable_h>, <&bt_host_wake_l>, <&bt_wake_h>; pinctrl-names = "default"; - shutdown-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; + shutdown-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; vbat-supply = <&vcc_wl>; vddio-supply = <&vcca_1v8_pmu>; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi index e9fa9bee995a..1e36f73840da 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi @@ -404,7 +404,7 @@ bluetooth { host-wakeup-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&bt_host_wake_h &bt_reg_on_h &bt_wake_host_h>; - shutdown-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>; + shutdown-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; vbat-supply = <&vcc_3v3>; vddio-supply = <&vcc_1v8>; };
Paragraph "3.4 Power up Timing Sequence" of the AzureWave-CM256SM datasheet mentions the following about the BT_REG_ON pin, which is connected to GPIO0_C4_d: When this pin is low and WL_REG_ON is high, the BT section is in reset. Therefor set that pin to GPIO_ACTIVE_HIGH so that it can be pulled low for a reset. If set to GPIO_ACTIVE_LOW, the following errors are observed: Bluetooth: hci0: command 0x0c03 tx timeout Bluetooth: hci0: BCM: Reset failed (-110) So fix the GPIO polarity by setting it to ACTIVE_HIGH. This also matches what other devices with the same BT device have. Fixes: a3a625086192 ("arm64: dts: rockchip: Fix reset-gpios property on brcm BT nodes") Signed-off-by: Diederik de Haas <didi.debian@cknow.org> --- Changes in v2: - Better commit description with references to the datasheet - Dropped the (self-)blame as it's not useful to evaluate the usefulness of this patch arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi | 2 +- arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)