@@ -38,7 +38,8 @@ static inline bool arch_collect_entropy(uint64_t *random)
#define fpu_reg_read(val) \
({ \
uint64_t *__val = (val); \
- asm volatile("stp q0, q1, [%0], #32\n\t" \
+ asm volatile(".arch_extension fp\n" \
+ "stp q0, q1, [%0], #32\n\t" \
"stp q2, q3, [%0], #32\n\t" \
"stp q4, q5, [%0], #32\n\t" \
"stp q6, q7, [%0], #32\n\t" \
@@ -71,7 +72,8 @@ static inline bool arch_collect_entropy(uint64_t *random)
#define fpu_reg_write(val) \
do { \
uint64_t *__val = (val); \
- asm volatile("ldp q0, q1, [%0], #32\n\t" \
+ asm volatile(".arch_extension fp\n" \
+ "ldp q0, q1, [%0], #32\n\t" \
"ldp q2, q3, [%0], #32\n\t" \
"ldp q4, q5, [%0], #32\n\t" \
"ldp q6, q7, [%0], #32\n\t" \
Since the tests are built with '-mgeneral-regs-only', clang-18 tends to push 'q' registers out of the scope and hence, the following error is observed: arm/fpu.c:281:3: error: instruction requires: fp-armv8 281 | fpu_reg_write(*indata); | ^ arm/fpu.c:74:15: note: expanded from macro 'fpu_reg_write' 74 | asm volatile("ldp q0, q1, [%0], #32\n\t" \ | ^ <inline asm>:1:2: note: instantiated into assembly here 1 | ldp q0, q1, [x8], #32 | ^ Hence, explicitly add fp support where these registers are used. Reported-by: Andrew Jones <andrew.jones@linux.dev> Signed-off-by: Raghavendra Rao Ananta <rananta@google.com> --- arm/fpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)