| Message ID | 20241029-pci_fixup_addr-v7-1-8310dc24fb7c@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PCI: dwc: opitimaze RC Host/EP pci_fixup_addr() | expand |
On Tue, Oct 29, 2024 at 12:36:34PM -0400, Frank Li wrote: > Introduce field 'parent_bus_addr' in struct of_pci_range to retrieve parent > bus address information. > > Refer to the diagram below to understand that the bus fabric in some > systems (like i.MX8QXP) does not use a 1:1 address map between input and > output. > > Currently, many controller drivers use .cpu_addr_fixup() callback hardcodes > that translation in the code, e.g., "cpu_addr & CDNS_PLAT_CPU_TO_BUS_ADDR" > (drivers/pci/controller/cadence/pcie-cadence-plat.c), > "cpu_addr + BUS_IATU_OFFSET"(drivers/pci/controller/dwc/pcie-intel-gw.c), > etc, even though those translations *should* be described via DT. > > The .cpu_addr_fixup() can be eliminated if DT correct reflect hardware > behavior and driver use 'parent_bus_addr' in struct of_pci_range. > > ┌─────────┐ ┌────────────┐ > ┌─────┐ │ │ IA: 0x8ff8_0000 │ │ > │ CPU ├───►│ ┌────►├─────────────────┐ │ PCI │ > └─────┘ │ │ │ IA: 0x8ff0_0000 │ │ │ > CPU Addr │ │ ┌─►├─────────────┐ │ │ Controller │ > 0x7ff8_0000─┼───┘ │ │ │ │ │ │ > │ │ │ │ │ │ │ PCI Addr > 0x7ff0_0000─┼──────┘ │ │ └──► IOSpace ─┼────────────► > │ │ │ │ │ 0 > 0x7000_0000─┼────────►├─────────┐ │ │ │ > └─────────┘ │ └──────► CfgSpace ─┼────────────► > BUS Fabric │ │ │ 0 > │ │ │ > └──────────► MemSpace ─┼────────────► > IA: 0x8000_0000 │ │ 0x8000_0000 > └────────────┘ > > bus@5f000000 { > compatible = "simple-bus"; > #address-cells = <1>; > #size-cells = <1>; > ranges = <0x80000000 0x0 0x70000000 0x10000000>; > > pcie@5f010000 { > compatible = "fsl,imx8q-pcie"; > reg = <0x5f010000 0x10000>, <0x8ff00000 0x80000>; > reg-names = "dbi", "config"; > #address-cells = <3>; > #size-cells = <2>; > device_type = "pci"; > bus-range = <0x00 0xff>; > ranges = <0x81000000 0 0x00000000 0x8ff80000 0 0x00010000>, > <0x82000000 0 0x80000000 0x80000000 0 0x0ff00000>; > ... > }; > }; > > 'parent_bus_addr' in struct of_pci_range can indicate above diagram internal > address (IA) address information. > > Reviewed-by: Rob Herring (Arm) <robh@kernel.org> > Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > Change from v5 to v7 > -none > > Change from v4 to v5 > - remove confused <0x5f000000 0x0 0x5f000000 0x21000000> > - change address order to 7ff8_0000, 7ff0_0000, 7000_0000 > - In commit message use parent bus addres > > Change from v3 to v4 > - improve commit message by driver source code path. > > Change from v2 to v3 > - cpu_untranslate_addr -> parent_bus_addr > - Add Rob's review tag > I changed commit message base on Bjorn, if you have concern about review > added tag, let me know. > > Change from v1 to v2 > - add parent_bus_addr in struct of_pci_range, instead adding new API. > --- > drivers/of/address.c | 2 ++ > include/linux/of_address.h | 1 + > 2 files changed, 3 insertions(+) > > diff --git a/drivers/of/address.c b/drivers/of/address.c > index 286f0c161e332..1a0229ee4e0b2 100644 > --- a/drivers/of/address.c > +++ b/drivers/of/address.c > @@ -811,6 +811,8 @@ struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, > else > range->cpu_addr = of_translate_address(parser->node, > parser->range + na); > + > + range->parent_bus_addr = of_read_number(parser->range + na, parser->pna); > range->size = of_read_number(parser->range + parser->pna + na, ns); > > parser->range += np; > diff --git a/include/linux/of_address.h b/include/linux/of_address.h > index 26a19daf0d092..13dd79186d02c 100644 > --- a/include/linux/of_address.h > +++ b/include/linux/of_address.h > @@ -26,6 +26,7 @@ struct of_pci_range { > u64 bus_addr; > }; > u64 cpu_addr; > + u64 parent_bus_addr; > u64 size; > u32 flags; > }; > > -- > 2.34.1 >
diff --git a/drivers/of/address.c b/drivers/of/address.c index 286f0c161e332..1a0229ee4e0b2 100644 --- a/drivers/of/address.c +++ b/drivers/of/address.c @@ -811,6 +811,8 @@ struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, else range->cpu_addr = of_translate_address(parser->node, parser->range + na); + + range->parent_bus_addr = of_read_number(parser->range + na, parser->pna); range->size = of_read_number(parser->range + parser->pna + na, ns); parser->range += np; diff --git a/include/linux/of_address.h b/include/linux/of_address.h index 26a19daf0d092..13dd79186d02c 100644 --- a/include/linux/of_address.h +++ b/include/linux/of_address.h @@ -26,6 +26,7 @@ struct of_pci_range { u64 bus_addr; }; u64 cpu_addr; + u64 parent_bus_addr; u64 size; u32 flags; };
Introduce field 'parent_bus_addr' in struct of_pci_range to retrieve parent bus address information. Refer to the diagram below to understand that the bus fabric in some systems (like i.MX8QXP) does not use a 1:1 address map between input and output. Currently, many controller drivers use .cpu_addr_fixup() callback hardcodes that translation in the code, e.g., "cpu_addr & CDNS_PLAT_CPU_TO_BUS_ADDR" (drivers/pci/controller/cadence/pcie-cadence-plat.c), "cpu_addr + BUS_IATU_OFFSET"(drivers/pci/controller/dwc/pcie-intel-gw.c), etc, even though those translations *should* be described via DT. The .cpu_addr_fixup() can be eliminated if DT correct reflect hardware behavior and driver use 'parent_bus_addr' in struct of_pci_range. ┌─────────┐ ┌────────────┐ ┌─────┐ │ │ IA: 0x8ff8_0000 │ │ │ CPU ├───►│ ┌────►├─────────────────┐ │ PCI │ └─────┘ │ │ │ IA: 0x8ff0_0000 │ │ │ CPU Addr │ │ ┌─►├─────────────┐ │ │ Controller │ 0x7ff8_0000─┼───┘ │ │ │ │ │ │ │ │ │ │ │ │ │ PCI Addr 0x7ff0_0000─┼──────┘ │ │ └──► IOSpace ─┼────────────► │ │ │ │ │ 0 0x7000_0000─┼────────►├─────────┐ │ │ │ └─────────┘ │ └──────► CfgSpace ─┼────────────► BUS Fabric │ │ │ 0 │ │ │ └──────────► MemSpace ─┼────────────► IA: 0x8000_0000 │ │ 0x8000_0000 └────────────┘ bus@5f000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x80000000 0x0 0x70000000 0x10000000>; pcie@5f010000 { compatible = "fsl,imx8q-pcie"; reg = <0x5f010000 0x10000>, <0x8ff00000 0x80000>; reg-names = "dbi", "config"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; bus-range = <0x00 0xff>; ranges = <0x81000000 0 0x00000000 0x8ff80000 0 0x00010000>, <0x82000000 0 0x80000000 0x80000000 0 0x0ff00000>; ... }; }; 'parent_bus_addr' in struct of_pci_range can indicate above diagram internal address (IA) address information. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> --- Change from v5 to v7 -none Change from v4 to v5 - remove confused <0x5f000000 0x0 0x5f000000 0x21000000> - change address order to 7ff8_0000, 7ff0_0000, 7000_0000 - In commit message use parent bus addres Change from v3 to v4 - improve commit message by driver source code path. Change from v2 to v3 - cpu_untranslate_addr -> parent_bus_addr - Add Rob's review tag I changed commit message base on Bjorn, if you have concern about review added tag, let me know. Change from v1 to v2 - add parent_bus_addr in struct of_pci_range, instead adding new API. --- drivers/of/address.c | 2 ++ include/linux/of_address.h | 1 + 2 files changed, 3 insertions(+)