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[RFC,v1,09/14] arm64: dts: mediatek: mt7988: extend efuse node

Message ID 20241029103937.45852-10-linux@fw-web.de (mailing list archive)
State New
Headers show
Series Add some mt7988 DTS labels and new nodes | expand

Commit Message

Frank Wunderlich Oct. 29, 2024, 10:39 a.m. UTC 
From: Frank Wunderlich <frank-w@public-files.de>

Add subnodes for efuse containing calibration data for lvts and phys.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
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Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
index 7371cd80a4ff..ed8ce1e6f68b 100644
--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
@@ -330,6 +330,25 @@  efuse: efuse@11f50000 {
 			reg = <0 0x11f50000 0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			cpufreq_calibration: calib@278 {
+				reg = <0x278 0x1>;
+			};
+			lvts_calibration: calib@918 {
+				reg = <0x918 0x28>;
+			};
+			phy_calibration_p0: calib@940 {
+				reg = <0x940 0x10>;
+			};
+			phy_calibration_p1: calib@954 {
+				reg = <0x954 0x10>;
+			};
+			phy_calibration_p2: calib@968 {
+				reg = <0x968 0x10>;
+			};
+			phy_calibration_p3: calib@97c {
+				reg = <0x97c 0x10>;
+			};
 		};
 
 		clock-controller@15000000 {