| Message ID | 20241029103937.45852-15-linux@fw-web.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add some mt7988 DTS labels and new nodes | expand |
Il 29/10/24 11:39, Frank Wunderlich ha scritto: > From: Frank Wunderlich <frank-w@public-files.de> > > Add operating points defining frequency/voltages of cpu cores. > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 45 +++++++++++++++++++++-- > 1 file changed, 41 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi > index e037854666c1..25669d498617 100644 > --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi > @@ -16,32 +16,69 @@ cpus { > #address-cells = <1>; > #size-cells = <0>; > > - cpu@0 { > + cpu0: cpu@0 { Where are those cpuX labels used? I don't see any usage. > compatible = "arm,cortex-a73"; > reg = <0x0>; > device_type = "cpu"; > enable-method = "psci"; > + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>, > + <&topckgen CLK_TOP_XTAL>; > + clock-names = "cpu", "intermediate"; > + operating-points-v2 = <&cluster0_opp>; > }; > > - cpu@1 { > + cpu1: cpu@1 { > compatible = "arm,cortex-a73"; > reg = <0x1>; > device_type = "cpu"; > enable-method = "psci"; > + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>, > + <&topckgen CLK_TOP_XTAL>; > + clock-names = "cpu", "intermediate"; > + operating-points-v2 = <&cluster0_opp>; > }; > > - cpu@2 { > + cpu2: cpu@2 { > compatible = "arm,cortex-a73"; > reg = <0x2>; > device_type = "cpu"; > enable-method = "psci"; > + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>, > + <&topckgen CLK_TOP_XTAL>; > + clock-names = "cpu", "intermediate"; > + operating-points-v2 = <&cluster0_opp>; > }; > > - cpu@3 { > + cpu3: cpu@3 { > compatible = "arm,cortex-a73"; > reg = <0x3>; > device_type = "cpu"; > enable-method = "psci"; > + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>, > + <&topckgen CLK_TOP_XTAL>; > + clock-names = "cpu", "intermediate"; > + operating-points-v2 = <&cluster0_opp>; > + }; > + > + cluster0_opp: opp-table-0 { > + compatible = "operating-points-v2"; > + opp-shared; > + opp00 { ...But you can also be consistent with other devicetrees and follow the pattern for the node names of the OPP entries. opp-800000000 opp-1100000000 ...etc Cheers, Angelo > + opp-hz = /bits/ 64 <800000000>; > + opp-microvolt = <850000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <1100000000>; > + opp-microvolt = <850000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <1500000000>; > + opp-microvolt = <850000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <1800000000>; > + opp-microvolt = <900000>; > + }; > }; > }; >
> Gesendet: Mittwoch, 27. November 2024 um 14:34
> Von: "AngeloGioacchino Del Regno" <angelogioacchino.delregno@collabora.com>
> An: "Frank Wunderlich" <linux@fw-web.de>, "Rob Herring" <robh@kernel.org>, "Krzysztof Kozlowski" <krzk+dt@kernel.org>, "Conor Dooley" <conor+dt@kernel.org>, "Matthias Brugger" <matthias.bgg@gmail.com>
> CC: "Frank Wunderlich" <frank-w@public-files.de>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org
> Betreff: Re: [RFC v1 14/14] arm64: dts: mediatek: mt7988: add operating-points
>
> Il 29/10/24 11:39, Frank Wunderlich ha scritto:
> > From: Frank Wunderlich <frank-w@public-files.de>
> >
> > Add operating points defining frequency/voltages of cpu cores.
> >
> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> > ---
> > arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 45 +++++++++++++++++++++--
> > 1 file changed, 41 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> > index e037854666c1..25669d498617 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> > @@ -16,32 +16,69 @@ cpus {
> > #address-cells = <1>;
> > #size-cells = <0>;
> >
> > - cpu@0 {
> > + cpu0: cpu@0 {
>
> Where are those cpuX labels used? I don't see any usage.
these are used in later patch and needed in uboot when we want to switch to OF_UPSTREAM.
> > compatible = "arm,cortex-a73";
> > reg = <0x0>;
> > device_type = "cpu";
> > enable-method = "psci";
> > + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
> > + <&topckgen CLK_TOP_XTAL>;
> > + clock-names = "cpu", "intermediate";
> > + operating-points-v2 = <&cluster0_opp>;
> > };
> >
> > - cpu@1 {
> > + cpu1: cpu@1 {
> > compatible = "arm,cortex-a73";
> > reg = <0x1>;
> > device_type = "cpu";
> > enable-method = "psci";
> > + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
> > + <&topckgen CLK_TOP_XTAL>;
> > + clock-names = "cpu", "intermediate";
> > + operating-points-v2 = <&cluster0_opp>;
> > };
> >
> > - cpu@2 {
> > + cpu2: cpu@2 {
> > compatible = "arm,cortex-a73";
> > reg = <0x2>;
> > device_type = "cpu";
> > enable-method = "psci";
> > + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
> > + <&topckgen CLK_TOP_XTAL>;
> > + clock-names = "cpu", "intermediate";
> > + operating-points-v2 = <&cluster0_opp>;
> > };
> >
> > - cpu@3 {
> > + cpu3: cpu@3 {
> > compatible = "arm,cortex-a73";
> > reg = <0x3>;
> > device_type = "cpu";
> > enable-method = "psci";
> > + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
> > + <&topckgen CLK_TOP_XTAL>;
> > + clock-names = "cpu", "intermediate";
> > + operating-points-v2 = <&cluster0_opp>;
> > + };
> > +
> > + cluster0_opp: opp-table-0 {
> > + compatible = "operating-points-v2";
> > + opp-shared;
> > + opp00 {
>
> ...But you can also be consistent with other devicetrees and follow the pattern
> for the node names of the OPP entries.
>
> opp-800000000
> opp-1100000000
> ...etc
ok, will change this..so just adding the opp-hz value to the name (or label)?
> Cheers,
> Angelo
>
> > + opp-hz = /bits/ 64 <800000000>;
> > + opp-microvolt = <850000>;
> > + };
> > + opp01 {
> > + opp-hz = /bits/ 64 <1100000000>;
> > + opp-microvolt = <850000>;
> > + };
> > + opp02 {
> > + opp-hz = /bits/ 64 <1500000000>;
> > + opp-microvolt = <850000>;
> > + };
> > + opp03 {
> > + opp-hz = /bits/ 64 <1800000000>;
> > + opp-microvolt = <900000>;
> > + };
> > };
> > };
> >
>
>
> </frank-w@public-files.de></frank-w@public-files.de></frank-w@public-files.de></matthias.bgg@gmail.com></conor+dt@kernel.org></krzk+dt@kernel.org></robh@kernel.org></linux@fw-web.de></angelogioacchino.delregno@collabora.com>
diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi index e037854666c1..25669d498617 100644 --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -16,32 +16,69 @@ cpus { #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { compatible = "arm,cortex-a73"; reg = <0x0>; device_type = "cpu"; enable-method = "psci"; + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>, + <&topckgen CLK_TOP_XTAL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster0_opp>; }; - cpu@1 { + cpu1: cpu@1 { compatible = "arm,cortex-a73"; reg = <0x1>; device_type = "cpu"; enable-method = "psci"; + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>, + <&topckgen CLK_TOP_XTAL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster0_opp>; }; - cpu@2 { + cpu2: cpu@2 { compatible = "arm,cortex-a73"; reg = <0x2>; device_type = "cpu"; enable-method = "psci"; + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>, + <&topckgen CLK_TOP_XTAL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster0_opp>; }; - cpu@3 { + cpu3: cpu@3 { compatible = "arm,cortex-a73"; reg = <0x3>; device_type = "cpu"; enable-method = "psci"; + clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>, + <&topckgen CLK_TOP_XTAL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster0_opp>; + }; + + cluster0_opp: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + opp00 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <850000>; + }; + opp01 { + opp-hz = /bits/ 64 <1100000000>; + opp-microvolt = <850000>; + }; + opp02 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <850000>; + }; + opp03 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <900000>; + }; }; };