From patchwork Mon Dec 2 02:56:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liu Ying X-Patchwork-Id: 13889983 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1D8FD4979C for ; Mon, 2 Dec 2024 04:43:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:MIME-Version:Content-Type: Content-Transfer-Encoding:References:In-Reply-To:Message-Id:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=TspDlAGAo547NwgAFno/jIClDZr2pKfdfxf0JB2YyAY=; b=sE7BX+0gyQMQdi4ETajBHPmft3 r8Ls2nd6oViFuoByBtYgxIXEWn0U9smnWSNn1G+PrHJKDRv8fjRC/EXV5lNd0DgSIwCEnLb2s/WyO 4M6ORs/oFovd92ZYitz9eekeKPjy8b7ARTvkma8Pqs0/LIKbLrbYBONeJZWlblDD10W2fsyRb5YWp nDrh+Hbt+/tORkcY4P5cOpFviChbyTGDWrcb0zkdB3hPFDtCnH3qv3lKdzC9wloZ9wXJYFVeRSj8I pl4+OUXhqRUo14PENhioSVmfa1GAXGvavLbWtUtfpNY025ycEzgLu+gvbHuJ7zLGfH3QJSTYjTjUR EtifXO7Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tHyHe-00000005433-0Qcy; Mon, 02 Dec 2024 04:43:42 +0000 Received: from mail-db8eur05on20610.outbound.protection.outlook.com ([2a01:111:f403:2614::610] helo=EUR05-DB8-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tHx9L-00000004xEt-35BW; Mon, 02 Dec 2024 03:31:08 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=dBP1vhISjf75gEsvKqLwi2dXLpPNF5NK+0ljvvJveinclBtiBq3kC85qIKIGQOPD07WfNXh4HIlS/saSVeC1fZQNJB8fi9nf3kK3Zeh1LfwUY58Tr/krWJSfBWdApnfbJYM2r0SbajYWIAacbcCV+Y6XAwguBB0b8I4KwBnT7/JktR7M/F83kdebJ6EACSBnG73AMi3MfcXFNgxqUiBYjb1JPMdJCgcF+8VzorkycDWIA/ozkIsv9GkzcrjLIiTn1S2XqPl1i/vJo+zve+m//a88oSxlUVJ2UmdCAWv9vC4Zc+LPrfelAI7tjBkXwk6PKUXASQdP5Gc7Mud3Qy4Acw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=TspDlAGAo547NwgAFno/jIClDZr2pKfdfxf0JB2YyAY=; b=dpxqVlzYOHtjr3A5mpt+2NcNRYUlDZ9aauqwTc1BcpvBwIBNn5+kZT6M9s3X67xRctfPYcmJTnHOcuq0z3rGfI3/7hwmh3iN1HFhz0UN9d9dQlg7MHjuFAmdv0bznzR6CWRG3u7xoi8r0Ql1ArwBMCDJSGx6vDoUvSgj+4Iq8iL2G9kA8aZlYUPU6bj48JCXi6GGtO01f5LVdCNyX9iS6yHQlf/qp3UlIVhgM7SMRjFP+Df1lUSd7SGTI+8VOWXjVh7bECMIDn9hIv6lJDM4BRgt3CH1eFhPIPzUpK/YWFDDE3sYr7twsM5EBAJxmWf/D5AML7J4EqP0CkPDMp7p1w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=TspDlAGAo547NwgAFno/jIClDZr2pKfdfxf0JB2YyAY=; b=dkkL52THqoHBfFhQZwABNuPimaZhNdqGR3lH8D7IF6qOV9KxaomdpasOXQbcKKhPsjQcm2vvqQw+ZkWxpaZm42YHlVo/SR1cRoKpBxV/NCdJuNn1DsjqDIUG2JsewlKDCQBrjTs3rmUU4PVKaYoYKvDb7JQcqAToA9Ck/ipEpRWFLOIypMadUe2QDSTxNJPLOi3Fi7rESOu9avfvuCUHPHanNIR3cifCi3r58eXx3ZaKCyaAudh64OogwCXjkYVfe6fD/3MuJ0dTQqB0YPMt60oM480pgc0rQeqke3eE304ZphqLoBf6kLMEGu+qAuJv8YJAc6deojNk67Z9U6TMlg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) by PA4PR04MB9318.eurprd04.prod.outlook.com (2603:10a6:102:2a5::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8207.17; Mon, 2 Dec 2024 02:57:20 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90%6]) with mapi id 15.20.8207.017; Mon, 2 Dec 2024 02:57:20 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: p.zabel@pengutronix.de, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, glx@linutronix.de, vkoul@kernel.org, kishon@kernel.org, aisheng.dong@nxp.com, agx@sigxcpu.org, francesco@dolcini.it, frank.li@nxp.com, dmitry.baryshkov@linaro.org, u.kleine-koenig@baylibre.com Subject: [PATCH v5 07/19] dt-bindings: interrupt-controller: Add i.MX8qxp Display Controller interrupt controller Date: Mon, 2 Dec 2024 10:56:23 +0800 Message-Id: <20241202025635.1274467-8-victor.liu@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241202025635.1274467-1-victor.liu@nxp.com> References: <20241202025635.1274467-1-victor.liu@nxp.com> X-ClientProxiedBy: SI2PR06CA0005.apcprd06.prod.outlook.com (2603:1096:4:186::12) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|PA4PR04MB9318:EE_ X-MS-Office365-Filtering-Correlation-Id: dd0d876a-9f76-4473-a7d9-08dd127d0983 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|52116014|7416014|376014|38350700014; X-Microsoft-Antispam-Message-Info: TlORTwG9O1EHYsfuQjqFN9YbW52xEtoVpnIa06+fPUvKESp9Hs/lxvYCHSW+de48k68wkL6K0zCZypyfwTHogOB+Xm2wmSVunbUECQ31b516z9hGCsh4S7d/BG0IoyE+wLDHfCjOi/80aaHMRAIeZo0A7+5S8FepjUXygDtRCWwgaY0I0mkLfNXvdxrpWggpDvcBNw3HUKuMEfoqaIXoKEdz6KBFjacNao8UcjTxCWZ3amfY9Xd8FyMRlB4lnTCuZ+PgJHpmijaTvU2ulWoeQoiAPMwW7uqfkudJaNHOTeEpeInpTdlQp6AhO3sUh8sCYJ3bWCCdwdgPmjGNb+ZdGoho6ca7UAkP/DyKYHIzEG16SioKQNHHdb9DYDjtKFlsP69kJMLsVQHuELrUYFz/fmF6xu4ikRWi5FitSKBSAbp5h+Kq4eoWDqmVIun62J9ZxRL6UNOoNCdqzzBrPpdM4n9F7I8wGL0zVPDdkBayypmkd/Pvp3tRMASaHNokVWvAvkbXEQ+C/FvmbwM5bEG/YK9It3FU1MtRdROv8L1QtbnNIZT4aG5jOP49GpxFET0a7FDvRcE9s5Ke8HwK6Ywfha3sR9CebjU+ABoHNIv2K2FjKP5Ofl6tzZQBSquTStmeNc8eEgwXXpyPPqQ5TMCSQEQ91X8cUA/i46Aesiw37o7IkaOcRPVWqSGfR3/T36m0par7l8rb3oemwuONZ2FhVGuoXOWuUup9t5bRlEePi07M4wPVg58x7OdLYfJHjnpHtZifEXgZpdr1xV8rA8bNyZ6fO2j29j8fs/bQuGNNOrxgp4tL6KLb7ZMCHK91aCFBYcdG+xOtjI+NytcmgeKiEYbb6dohmPLoYC1c63iZDYfcxcOSNfjbeaCLK1hmVxzzLOwVdvY3MwPidn44DCkPTGO9Y31m0UGRZn53ZPGWS/J25s5kiHlOM4apkVPl0KikIX66B52BEEVD9kH4bQvR032AtdnnA+EFQyZpUkLJdRTlPCwOPlLFkU85LE3ksJqFTPkP5NwLPmDXr5lP3bGn6wc4CqPXoqbQIltbuoQFhaa/Q48BPSrURkPWYNg58aqpz7pSSoU0WLyc5To+DdBEjoCQHgyxAoAc3Ex69A76SRK4jq6tTmRSug4vZ2fHtb327sdmfQr4S8jwFzMUw7zH8JvCpHa6NYGN694DCKAv+vYjLbBxmL/7YrJ4rx0N8LXXzWzrV+5v/LHvOvniw8JH+hbef9g3LacAw65ZIrxQ1KKTWxSf50S9voVXWs3AYyhhrUC6LOEkG4s3HIBjgYblIn1jaF9XvnggTzQHA8123wCdsCQNsFjIYniaK7eZTddNA9d/H9HPI4AlWIizZ0f5F0XVunVu0wEhXdmmbPOtpZ8= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM7PR04MB7046.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(366016)(52116014)(7416014)(376014)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: GfXQzSK3UdfePD+hMU3stZW7frki7Lj4uojN1Vy9lr9MdtJtwU7nj7B/KYNkveIMc8y1zcINcCZIT3ufha0SdNXGW0vKilEM5jh+0OXorkCYb+iYp9O/5fK+aZmTJNQzC2II/ja7ZPsQ6GtBu+ZlzKx7cVqeFQtyLorwc7aCi1Iq8okAMmG7/v0fseKGws6Hl4IyYOrZW2NtwPMNukotrib76+LChPZNmypFuWExkzmEZywdNsDOiTG2xaA6/voO0UNTn0TKV27JnLn3kPZtZH8vGTrS35ftz9ga9kXlho518beu7UY9j7fZPfxCPoKsvJq2lp0sP8xTg2kltSBLdlN/boAInHh0qgzaFD5ngVZm4QkT5xSzLE1rG8uv5Vgru/7iHkrcccomEh4HXsvNYsg8nfQDOg2DhVZ8HAXzqqVPlRC8kM9cCjDEi1oRzlmgiEXVKBqxCULm2yWAPhtj3QYyMcBhElk66hkeVZfGTR0egQabNKUHsVbDeZTAWv+pIF8bldL7E2i053PLLNMAXukFLBeN2pX2oWSmySPReLKrF8i8jdLQIq1r1L+NHA9kRuG2bqRlEdGEBIDE5icw+io6EGK3ox0PkZzAuWRmPv4zrGNHEKRS6E1QoNUHpQ9rekq3xO+86UARFJC/h2oZ3XQWuloA+JRrii+QG7bBkGyd5dBHp9DBG7pUoiNlVR3AtIrZYONAnWoeXWi5uRPftxhYYXxfW3MZdB1iFuYTrzUSu0wtPwELntRpiUUPRWVYYn+3VLFAocwRN9WCPGoDqetfJm9+hw3PpD4rEV5wGpKkmh2IgnrOyAzEd3l79GSKF1klWjXFih10h23ldvqY30swPwsNLxjMx5suROgtKtn8Hk01hTFszFNoW4Tekbs7Kqjpk+mGhDZdKkViqYU7tIuUbS7kg67vpwup7MqGkcsYxa58dIuE4gjsc6Hr/dVXf2tV5IBBdGuGlUnwEqvXR6ebeTRM6oBcq5sGd4W8/tSgqoq+ebnYw5CYTMov3Aq/NXOoB3D8oK77AVkakdh7hwFyeFIF/GKxIyYzxtFYmTBWRt+1Lg3f4pu4adfquScwmndqWVbX0dsPznBYx3wfovCiy0s3HtNfY55U1dgB0vCDpw2sO7bzjaz9Pkvv71UdCrDebTlPVd++sdBuUAm228n0l90GHLeGq1Q1PVUAXSFJEZLvRdMFed4uNo+mhfbsJOc3A5MM7tE3UL/xQIrNSzegB60xK4+ERV3eGDR288AGV5zP62g7CA+mdOqjXIWdI5icTUFTVB+0HvbFX9KA9fd0SXkalh9X/GvsDWJkDMgfh+k2uKEeyUzV67O1pOsCwOcrrmzv4xVzdv4zgOVX3X998YbP8cbkC6KIsnWRDy+09TCmSctaZlRtETF9F6hYW792AvCWR386t+9X97ed3uGgbZPJU2//g3CIk89XwtzqwxY4ceUZbE247dyF/IxK8FJJ7JwxJYB9MytH8etDkN/dC6ND0ahfmwmjYlEJl1HI59tEiUBHhYyVmUxvfcxxIGyUWMYKOikiDkdlM9EbTOiOJjw2ptGOLXMmt1ZLjXL6x/7lVjmygTSEKr54dHo9 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: dd0d876a-9f76-4473-a7d9-08dd127d0983 X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Dec 2024 02:57:19.9603 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 15N4/5NnNomLBsrfHCJ2qcf7NEjVXo9XAsUupJyO9q6hpkvB8IdjA71mkidn3L7wqJA5mYdrZFX1lbr0rUdI9A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR04MB9318 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241201_193103_922521_D3BB88F3 X-CRM114-Status: GOOD ( 12.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org i.MX8qxp Display Controller has a built-in interrupt controller to support Enable/Status/Preset/Clear interrupt bit. Signed-off-by: Liu Ying Reviewed-by: Rob Herring (Arm) --- v5: * No change. v4: * No change. v3: * Collect Rob's R-b tag. v2: * Drop unneeded "|". (Krzysztof) .../fsl,imx8qxp-dc-intc.yaml | 318 ++++++++++++++++++ 1 file changed, 318 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,imx8qxp-dc-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,imx8qxp-dc-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,imx8qxp-dc-intc.yaml new file mode 100644 index 000000000000..6985ee644a25 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,imx8qxp-dc-intc.yaml @@ -0,0 +1,318 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/fsl,imx8qxp-dc-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8qxp Display Controller interrupt controller + +description: | + The Display Controller has a built-in interrupt controller with the following + features for all relevant HW events: + + * Enable bit (mask) + * Status bit (set by an HW event) + * Preset bit (can be used by SW to set status) + * Clear bit (used by SW to reset the status) + + Each interrupt can be connected as IRQ (maskable) and/or NMI (non-maskable). + Alternatively the un-masked trigger signals for all HW events are provided, + allowing it to use a global interrupt controller instead. + + Each interrupt can be protected against SW running in user mode. In that case, + only privileged AHB access can control the interrupt status. + +maintainers: + - Liu Ying + +properties: + compatible: + const: fsl,imx8qxp-dc-intc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + + interrupts: + items: + - description: store9 shadow load interrupt(blit engine) + - description: store9 frame complete interrupt(blit engine) + - description: store9 sequence complete interrupt(blit engine) + - description: + extdst0 shadow load interrupt + (display controller, content stream 0) + - description: + extdst0 frame complete interrupt + (display controller, content stream 0) + - description: + extdst0 sequence complete interrupt + (display controller, content stream 0) + - description: + extdst4 shadow load interrupt + (display controller, safety stream 0) + - description: + extdst4 frame complete interrupt + (display controller, safety stream 0) + - description: + extdst4 sequence complete interrupt + (display controller, safety stream 0) + - description: + extdst1 shadow load interrupt + (display controller, content stream 1) + - description: + extdst1 frame complete interrupt + (display controller, content stream 1) + - description: + extdst1 sequence complete interrupt + (display controller, content stream 1) + - description: + extdst5 shadow load interrupt + (display controller, safety stream 1) + - description: + extdst5 frame complete interrupt + (display controller, safety stream 1) + - description: + extdst5 sequence complete interrupt + (display controller, safety stream 1) + - description: + disengcfg0 shadow load interrupt + (display controller, display stream 0) + - description: + disengcfg0 frame complete interrupt + (display controller, display stream 0) + - description: + disengcfg0 sequence complete interrupt + (display controller, display stream 0) + - description: + framegen0 programmable interrupt0 + (display controller, display stream 0) + - description: + framegen0 programmable interrupt1 + (display controller, display stream 0) + - description: + framegen0 programmable interrupt2 + (display controller, display stream 0) + - description: + framegen0 programmable interrupt3 + (display controller, display stream 0) + - description: + signature0 shadow load interrupt + (display controller, display stream 0) + - description: + signature0 measurement valid interrupt + (display controller, display stream 0) + - description: + signature0 error condition interrupt + (display controller, display stream 0) + - description: + disengcfg1 shadow load interrupt + (display controller, display stream 1) + - description: + disengcfg1 frame complete interrupt + (display controller, display stream 1) + - description: + disengcfg1 sequence complete interrupt + (display controller, display stream 1) + - description: + framegen1 programmable interrupt0 + (display controller, display stream 1) + - description: + framegen1 programmable interrupt1 + (display controller, display stream 1) + - description: + framegen1 programmable interrupt2 + (display controller, display stream 1) + - description: + framegen1 programmable interrupt3 + (display controller, display stream 1) + - description: + signature1 shadow load interrupt + (display controller, display stream 1) + - description: + signature1 measurement valid interrupt + (display controller, display stream 1) + - description: + signature1 error condition interrupt + (display controller, display stream 1) + - description: reserved + - description: + command sequencer error condition interrupt(command sequencer) + - description: + common control software interrupt0(common control) + - description: + common control software interrupt1(common control) + - description: + common control software interrupt2(common control) + - description: + common control software interrupt3(common control) + - description: + framegen0 synchronization status activated interrupt + (display controller, safety stream 0) + - description: + framegen0 synchronization status deactivated interrupt + (display controller, safety stream 0) + - description: + framegen0 synchronization status activated interrupt + (display controller, content stream 0) + - description: + framegen0 synchronization status deactivated interrupt + (display controller, content stream 0) + - description: + framegen1 synchronization status activated interrupt + (display controller, safety stream 1) + - description: + framegen1 synchronization status deactivated interrupt + (display controller, safety stream 1) + - description: + framegen1 synchronization status activated interrupt + (display controller, content stream 1) + - description: + framegen1 synchronization status deactivated interrupt + (display controller, content stream 1) + minItems: 49 + + interrupt-names: + items: + - const: store9_shdload + - const: store9_framecomplete + - const: store9_seqcomplete + - const: extdst0_shdload + - const: extdst0_framecomplete + - const: extdst0_seqcomplete + - const: extdst4_shdload + - const: extdst4_framecomplete + - const: extdst4_seqcomplete + - const: extdst1_shdload + - const: extdst1_framecomplete + - const: extdst1_seqcomplete + - const: extdst5_shdload + - const: extdst5_framecomplete + - const: extdst5_seqcomplete + - const: disengcfg_shdload0 + - const: disengcfg_framecomplete0 + - const: disengcfg_seqcomplete0 + - const: framegen0_int0 + - const: framegen0_int1 + - const: framegen0_int2 + - const: framegen0_int3 + - const: sig0_shdload + - const: sig0_valid + - const: sig0_error + - const: disengcfg_shdload1 + - const: disengcfg_framecomplete1 + - const: disengcfg_seqcomplete1 + - const: framegen1_int0 + - const: framegen1_int1 + - const: framegen1_int2 + - const: framegen1_int3 + - const: sig1_shdload + - const: sig1_valid + - const: sig1_error + - const: reserved + - const: cmdseq_error + - const: comctrl_sw0 + - const: comctrl_sw1 + - const: comctrl_sw2 + - const: comctrl_sw3 + - const: framegen0_primsync_on + - const: framegen0_primsync_off + - const: framegen0_secsync_on + - const: framegen0_secsync_off + - const: framegen1_primsync_on + - const: framegen1_primsync_off + - const: framegen1_secsync_on + - const: framegen1_secsync_off + minItems: 49 + +required: + - compatible + - reg + - clocks + - interrupt-controller + - "#interrupt-cells" + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include + + interrupt-controller@56180040 { + compatible = "fsl,imx8qxp-dc-intc"; + reg = <0x56180040 0x60>; + clocks = <&dc0_lpcg IMX_LPCG_CLK_5>; + interrupt-controller; + interrupt-parent = <&dc0_irqsteer>; + #interrupt-cells = <1>; + interrupts = <448>, <449>, <450>, <64>, + <65>, <66>, <67>, <68>, + <69>, <70>, <193>, <194>, + <195>, <196>, <197>, <72>, + <73>, <74>, <75>, <76>, + <77>, <78>, <79>, <80>, + <81>, <199>, <200>, <201>, + <202>, <203>, <204>, <205>, + <206>, <207>, <208>, <5>, + <0>, <1>, <2>, <3>, + <4>, <82>, <83>, <84>, + <85>, <209>, <210>, <211>, + <212>; + interrupt-names = "store9_shdload", + "store9_framecomplete", + "store9_seqcomplete", + "extdst0_shdload", + "extdst0_framecomplete", + "extdst0_seqcomplete", + "extdst4_shdload", + "extdst4_framecomplete", + "extdst4_seqcomplete", + "extdst1_shdload", + "extdst1_framecomplete", + "extdst1_seqcomplete", + "extdst5_shdload", + "extdst5_framecomplete", + "extdst5_seqcomplete", + "disengcfg_shdload0", + "disengcfg_framecomplete0", + "disengcfg_seqcomplete0", + "framegen0_int0", + "framegen0_int1", + "framegen0_int2", + "framegen0_int3", + "sig0_shdload", + "sig0_valid", + "sig0_error", + "disengcfg_shdload1", + "disengcfg_framecomplete1", + "disengcfg_seqcomplete1", + "framegen1_int0", + "framegen1_int1", + "framegen1_int2", + "framegen1_int3", + "sig1_shdload", + "sig1_valid", + "sig1_error", + "reserved", + "cmdseq_error", + "comctrl_sw0", + "comctrl_sw1", + "comctrl_sw2", + "comctrl_sw3", + "framegen0_primsync_on", + "framegen0_primsync_off", + "framegen0_secsync_on", + "framegen0_secsync_off", + "framegen1_primsync_on", + "framegen1_primsync_off", + "framegen1_secsync_on", + "framegen1_secsync_off"; + };