@@ -35,6 +35,22 @@ reg_3p3v: regulator-3p3v {
};
};
+&cpu0 {
+ proc-supply = <&rt5190_buck3>;
+};
+
+&cpu1 {
+ proc-supply = <&rt5190_buck3>;
+};
+
+&cpu2 {
+ proc-supply = <&rt5190_buck3>;
+};
+
+&cpu3 {
+ proc-supply = <&rt5190_buck3>;
+};
+
&cpu_thermal {
trips {
cpu_trip_hot: hot {
@@ -16,7 +16,7 @@ cpus {
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu0: cpu@0 {
compatible = "arm,cortex-a73";
reg = <0x0>;
device_type = "cpu";
@@ -27,7 +27,7 @@ cpu@0 {
operating-points-v2 = <&cluster0_opp>;
};
- cpu@1 {
+ cpu1: cpu@1 {
compatible = "arm,cortex-a73";
reg = <0x1>;
device_type = "cpu";
@@ -38,7 +38,7 @@ cpu@1 {
operating-points-v2 = <&cluster0_opp>;
};
- cpu@2 {
+ cpu2: cpu@2 {
compatible = "arm,cortex-a73";
reg = <0x2>;
device_type = "cpu";
@@ -49,7 +49,7 @@ cpu@2 {
operating-points-v2 = <&cluster0_opp>;
};
- cpu@3 {
+ cpu3: cpu@3 {
compatible = "arm,cortex-a73";
reg = <0x3>;
device_type = "cpu";