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(fttx-pool-217.61.149.104.bambit.de [217.61.149.104]) by mxbox3.masterlogin.de (Postfix) with ESMTPSA id 3F6CE3600C0; Mon, 2 Dec 2024 12:26:12 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 04/18] arm64: dts: mediatek: mt7988: add lvts node Date: Mon, 2 Dec 2024 13:25:45 +0100 Message-ID: <20241202122602.30734-5-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241202122602.30734-1-linux@fw-web.de> References: <20241202122602.30734-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 8b4c00e1-9437-4750-95d9-f1438fe1860c X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241202_042614_551291_A03AEA4E X-CRM114-Status: GOOD ( 10.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Frank Wunderlich Add Low Voltage Thermal Sensor (LVTS) node for mt7988 SoC. Signed-off-by: Frank Wunderlich --- changes: v2: squash - "arm64: dts: mediatek: mt7988: add label for efuse" - "arm64: dts: mediatek: mt7988: extend efuse node" (drop other efuse subnodes) --- arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi index 5e40446cb7b3..f7748a840297 100644 --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include / { compatible = "mediatek,mt7988a"; @@ -85,6 +86,7 @@ infracfg: clock-controller@10001000 { compatible = "mediatek,mt7988-infracfg", "syscon"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; topckgen: clock-controller@1001b000 { @@ -250,6 +252,17 @@ i2c@11005000 { status = "disabled"; }; + lvts: lvts@1100a000 { + compatible = "mediatek,mt7988-lvts-ap"; + #thermal-sensor-cells = <1>; + reg = <0 0x1100a000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_26M_THERM_SYSTEM>; + interrupts = ; + resets = <&infracfg MT7988_INFRA_RST1_THERM_CTRL_SWRST>; + nvmem-cells = <&lvts_calibration>; + nvmem-cell-names = "lvts-calib-data-1"; + }; + usb@11190000 { compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci"; reg = <0 0x11190000 0 0x2e00>, @@ -307,11 +320,15 @@ clock-controller@11f40000 { #clock-cells = <1>; }; - efuse@11f50000 { + efuse: efuse@11f50000 { compatible = "mediatek,mt7988-efuse", "mediatek,efuse"; reg = <0 0x11f50000 0 0x1000>; #address-cells = <1>; #size-cells = <1>; + + lvts_calibration: calib@918 { + reg = <0x918 0x28>; + }; }; clock-controller@15000000 {