Message ID | 20241219015146.706482-2-ming.qian@oss.nxp.com (mailing list archive) |
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State | New |
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[1/2] media: amphion: Support display delay for Hevc format
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diff --git a/drivers/media/platform/amphion/vpu_malone.c b/drivers/media/platform/amphion/vpu_malone.c index 8f4aa48b2d65..3750a2618b0e 100644 --- a/drivers/media/platform/amphion/vpu_malone.c +++ b/drivers/media/platform/amphion/vpu_malone.c @@ -25,6 +25,9 @@ #include "vpu_imx8q.h" #include "vpu_malone.h" +static bool frame_flush_mode; +module_param(frame_flush_mode, bool, 0644); + #define CMD_SIZE 25600 #define MSG_SIZE 25600 #define CODEC_SIZE 0x1000 @@ -1571,7 +1574,7 @@ static int vpu_malone_input_frame_data(struct vpu_malone_str_buffer __iomem *str vpu_malone_update_wptr(str_buf, wptr); - if (disp_imm && !vpu_vb_is_codecconfig(vbuf)) { + if ((disp_imm || frame_flush_mode) && !vpu_vb_is_codecconfig(vbuf)) { ret = vpu_malone_add_scode(inst->core->iface, inst->id, &inst->stream_buffer,
The amphion decoder will pre-parse 3 frames before decoding the first frame. If we append a flush padding data after frame, the decoder will finish parsing and start to decode when the flush data is parsed. It can reduce the decoding latency. In the past, we only enable this mode when the display delay is set to 0. But we still can enable this mode without changing the display order, so we add a frame_flush_mode parameter to enable it. Signed-off-by: Ming Qian <ming.qian@oss.nxp.com> --- drivers/media/platform/amphion/vpu_malone.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)