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[34.34.173.130]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c84705esm4227874f8f.44.2024.12.20.06.45.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Dec 2024 06:45:56 -0800 (PST) From: Tudor Ambarus Date: Fri, 20 Dec 2024 14:45:44 +0000 Subject: [PATCH v3 1/4] arm64: dts: exynos: gs101: add SRAM node MIME-Version: 1.0 Message-Id: <20241220-gs101-acpm-dt-v3-1-642d64daa5d1@linaro.org> References: <20241220-gs101-acpm-dt-v3-0-642d64daa5d1@linaro.org> In-Reply-To: <20241220-gs101-acpm-dt-v3-0-642d64daa5d1@linaro.org> To: Peter Griffin , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Catalin Marinas , Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, kernel-team@android.com, willmcvicker@google.com, peter.griffin@linaro.org, daniel.lezcano@linaro.org, vincent.guittot@linaro.org, ulf.hansson@linaro.org, arnd@arndb.de, Jassi Brar , Tudor Ambarus X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1734705955; l=979; i=tudor.ambarus@linaro.org; s=20241212; h=from:subject:message-id; bh=qdRRh88PR8yD7/wyF9wDElmu1pjR7jVhv88q1onGcQ8=; b=xgCFIoxvhBDc1QD+CRRVZZxpOKdMIoc1Iu8Bt6N5fkkcbFjSxXufey8F4ncY4KX1msxpc2ThJ hl2m1ZchsxRAcwd258Rs9f//Ez10uF+otAbE26Mog4rxirg9m0+rgjY X-Developer-Key: i=tudor.ambarus@linaro.org; a=ed25519; pk=uQzE0NXo3dIjeowMTOPCpIiPHEz12IA/MbyzrZVh9WI= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241220_064558_600039_1A23DF1C X-CRM114-Status: UNSURE ( 9.82 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SRAM is used by the ACPM protocol to retrieve the ACPM channels information, which includes the TX/RX rings among other channel configuration data. Add the SRAM node. Signed-off-by: Tudor Ambarus --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 302c5beb224a..1441e9a252c2 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -269,6 +269,14 @@ bldr_log_hist_reserved: bldr-log-hist-reserved@fd900000 { }; }; + apm_sram: sram@2039000 { + compatible = "mmio-sram"; + reg = <0x0 0x2039000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x2039000 0x40000>; + }; + soc: soc@0 { compatible = "simple-bus"; #address-cells = <1>;