| Message ID | 20241221101137.1405271-1-maz@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | KVM: arm64: nv: Advertise the lack of AArch32 EL0 support | expand |
On Sat, Dec 21, 2024 at 10:11:37AM +0000, Marc Zyngier wrote: > Although we never supported 32bit anywhere in NV, we fail to > advertise so for EL0, probably owing to the relative lack of > hardware supporting both NV2 and 32bit EL0. > > Add some sanitising to ID_AA64PFR0_EL1.EL0, and reaffirm that > "in 64bit-only we trust". > > Reported-by: Oliver Upton <oliver.upton@linux.dev> > Signed-off-by: Marc Zyngier <maz@kernel.org> Thanks! Acked-by: Oliver Upton <oliver.upton@linux.dev>
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c index 9b36218b48def..9e74f7b38e056 100644 --- a/arch/arm64/kvm/nested.c +++ b/arch/arm64/kvm/nested.c @@ -830,8 +830,10 @@ static void limit_nv_id_regs(struct kvm *kvm) NV_FTR(PFR0, RAS) | NV_FTR(PFR0, EL3) | NV_FTR(PFR0, EL2) | - NV_FTR(PFR0, EL1)); - /* 64bit EL1/EL2/EL3 only */ + NV_FTR(PFR0, EL1) | + NV_FTR(PFR0, EL0)); + /* 64bit only at any EL */ + val |= FIELD_PREP(NV_FTR(PFR0, EL0), 0b0001); val |= FIELD_PREP(NV_FTR(PFR0, EL1), 0b0001); val |= FIELD_PREP(NV_FTR(PFR0, EL2), 0b0001); val |= FIELD_PREP(NV_FTR(PFR0, EL3), 0b0001);
Although we never supported 32bit anywhere in NV, we fail to advertise so for EL0, probably owing to the relative lack of hardware supporting both NV2 and 32bit EL0. Add some sanitising to ID_AA64PFR0_EL1.EL0, and reaffirm that "in 64bit-only we trust". Reported-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/kvm/nested.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)